598   OS << "\nstatic const unsigned " << ProcModel.ModelName  in EmitProcessorResourceSubUnits()
637     OS << ProcModel.ModelName << "RegisterFiles,\n  " << (1 + NumRegisterFiles);  in EmitRegisterFileInfo()
643     OS << ProcModel.ModelName << "RegisterCosts,\n  ";  in EmitRegisterFileInfo()
659   OS << "static const llvm::MCRegisterCostEntry " << ProcModel.ModelName  in EmitRegisterFileTables()
682   OS << "static const llvm::MCRegisterFileDesc " << ProcModel.ModelName  in EmitRegisterFileTables()
733   OS << "\nstatic const llvm::MCExtraProcessorInfo " << ProcModel.ModelName  in EmitExtraProcessorInfo()
755   OS << "static const llvm::MCProcResourceDesc " << ProcModel.ModelName  in EmitProcessorResources()
792       OS << ProcModel.ModelName << "ProcResourceSubUnits + "  in EmitProcessorResources()
826                     "defined for processor " + ProcModel.ModelName +  in FindWriteResources()
843                       ProcModel.ModelName);  in FindWriteResources()
878                     "defined for processor " + ProcModel.ModelName +  in FindReadAdvance()
895                       ProcModel.ModelName);  in FindReadAdvance()
1034         LLVM_DEBUG(dbgs() << ProcModel.ModelName  in GenSchedClassTables()
1283        << PI->ModelName << "SchedClasses[] = {\n";  in EmitSchedClassTables()
1310     OS << "}; // " << PI->ModelName << "SchedClasses\n";  in EmitSchedClassTables()
1329     OS << "static const llvm::MCSchedModel " << PM.ModelName << " = {\n";  in EmitProcessorModels()
1351       OS << "  " << PM.ModelName << "ProcResources" << ",\n"  in EmitProcessorModels()
1352          << "  " << PM.ModelName << "SchedClasses" << ",\n"  in EmitProcessorModels()
1364       OS << "  &" << PM.ModelName << "ExtraInfo,\n";  in EmitProcessorModels()
1389       SchedModels.getModelForProc(Processor).ModelName;  in EmitProcessorLookup()
1599         OS << "{ // " << (SchedModels.procModelBegin() + PI)->ModelName << '\n';  in emitSchedModelHelpersImpl()