Lines Matching refs:CodeGenProcModel
94 unsigned EmitRegisterFileTables(const CodeGenProcModel &ProcModel,
96 void EmitLoadStoreQueueInfo(const CodeGenProcModel &ProcModel,
98 void EmitExtraProcessorInfo(const CodeGenProcModel &ProcModel,
102 void EmitProcessorResourceSubUnits(const CodeGenProcModel &ProcModel,
104 void EmitProcessorResources(const CodeGenProcModel &ProcModel,
107 const CodeGenProcModel &ProcModel);
109 const CodeGenProcModel &ProcModel);
111 const CodeGenProcModel &ProcModel);
112 void GenSchedClassTables(const CodeGenProcModel &ProcModel,
362 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitStageAndOperandCycleData()
415 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitStageAndOperandCycleData()
597 const CodeGenProcModel &ProcModel, raw_ostream &OS) { in EmitProcessorResourceSubUnits()
619 static void EmitRetireControlUnitInfo(const CodeGenProcModel &ProcModel, in EmitRetireControlUnitInfo()
633 static void EmitRegisterFileInfo(const CodeGenProcModel &ProcModel, in EmitRegisterFileInfo()
650 SubtargetEmitter::EmitRegisterFileTables(const CodeGenProcModel &ProcModel, in EmitRegisterFileTables()
702 void SubtargetEmitter::EmitLoadStoreQueueInfo(const CodeGenProcModel &ProcModel, in EmitLoadStoreQueueInfo()
726 void SubtargetEmitter::EmitExtraProcessorInfo(const CodeGenProcModel &ProcModel, in EmitExtraProcessorInfo()
750 void SubtargetEmitter::EmitProcessorResources(const CodeGenProcModel &ProcModel, in EmitProcessorResources()
808 const CodeGenSchedRW &SchedWrite, const CodeGenProcModel &ProcModel) { in FindWriteResources()
861 const CodeGenProcModel &ProcModel) { in FindReadAdvance()
914 const CodeGenProcModel &PM) { in ExpandProcResources()
959 void SubtargetEmitter::GenSchedClassTables(const CodeGenProcModel &ProcModel, in GenSchedClassTables()
1316 for (const CodeGenProcModel &PM : SchedModels.procModels()) { in EmitProcessorModels()
1421 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitSchedModel()