9011 static void Print_x86_float_state_t(MachO::x86_float_state64_t &fpu) {  in Print_x86_float_state_t()  argument
9012   outs() << "\t    fpu_reserved[0] " << fpu.fpu_reserved[0];  in Print_x86_float_state_t()
9013   outs() << " fpu_reserved[1] " << fpu.fpu_reserved[1] << "\n";  in Print_x86_float_state_t()
9014   outs() << "\t    control: invalid " << fpu.fpu_fcw.invalid;  in Print_x86_float_state_t()
9015   outs() << " denorm " << fpu.fpu_fcw.denorm;  in Print_x86_float_state_t()
9016   outs() << " zdiv " << fpu.fpu_fcw.zdiv;  in Print_x86_float_state_t()
9017   outs() << " ovrfl " << fpu.fpu_fcw.ovrfl;  in Print_x86_float_state_t()
9018   outs() << " undfl " << fpu.fpu_fcw.undfl;  in Print_x86_float_state_t()
9019   outs() << " precis " << fpu.fpu_fcw.precis << "\n";  in Print_x86_float_state_t()
9021   if (fpu.fpu_fcw.pc == MachO::x86_FP_PREC_24B)  in Print_x86_float_state_t()
9023   else if (fpu.fpu_fcw.pc == MachO::x86_FP_PREC_53B)  in Print_x86_float_state_t()
9025   else if (fpu.fpu_fcw.pc == MachO::x86_FP_PREC_64B)  in Print_x86_float_state_t()
9028     outs() << fpu.fpu_fcw.pc << " ";  in Print_x86_float_state_t()
9030   if (fpu.fpu_fcw.rc == MachO::x86_FP_RND_NEAR)  in Print_x86_float_state_t()
9032   else if (fpu.fpu_fcw.rc == MachO::x86_FP_RND_DOWN)  in Print_x86_float_state_t()
9034   else if (fpu.fpu_fcw.rc == MachO::x86_FP_RND_UP)  in Print_x86_float_state_t()
9036   else if (fpu.fpu_fcw.rc == MachO::x86_FP_CHOP)  in Print_x86_float_state_t()
9039   outs() << "\t    status: invalid " << fpu.fpu_fsw.invalid;  in Print_x86_float_state_t()
9040   outs() << " denorm " << fpu.fpu_fsw.denorm;  in Print_x86_float_state_t()
9041   outs() << " zdiv " << fpu.fpu_fsw.zdiv;  in Print_x86_float_state_t()
9042   outs() << " ovrfl " << fpu.fpu_fsw.ovrfl;  in Print_x86_float_state_t()
9043   outs() << " undfl " << fpu.fpu_fsw.undfl;  in Print_x86_float_state_t()
9044   outs() << " precis " << fpu.fpu_fsw.precis;  in Print_x86_float_state_t()
9045   outs() << " stkflt " << fpu.fpu_fsw.stkflt << "\n";  in Print_x86_float_state_t()
9046   outs() << "\t            errsumm " << fpu.fpu_fsw.errsumm;  in Print_x86_float_state_t()
9047   outs() << " c0 " << fpu.fpu_fsw.c0;  in Print_x86_float_state_t()
9048   outs() << " c1 " << fpu.fpu_fsw.c1;  in Print_x86_float_state_t()
9049   outs() << " c2 " << fpu.fpu_fsw.c2;  in Print_x86_float_state_t()
9050   outs() << " tos " << fpu.fpu_fsw.tos;  in Print_x86_float_state_t()
9051   outs() << " c3 " << fpu.fpu_fsw.c3;  in Print_x86_float_state_t()
9052   outs() << " busy " << fpu.fpu_fsw.busy << "\n";  in Print_x86_float_state_t()
9053   outs() << "\t    fpu_ftw " << format("0x%02" PRIx32, fpu.fpu_ftw);  in Print_x86_float_state_t()
9054   outs() << " fpu_rsrv1 " << format("0x%02" PRIx32, fpu.fpu_rsrv1);  in Print_x86_float_state_t()
9055   outs() << " fpu_fop " << format("0x%04" PRIx32, fpu.fpu_fop);  in Print_x86_float_state_t()
9056   outs() << " fpu_ip " << format("0x%08" PRIx32, fpu.fpu_ip) << "\n";  in Print_x86_float_state_t()
9057   outs() << "\t    fpu_cs " << format("0x%04" PRIx32, fpu.fpu_cs);  in Print_x86_float_state_t()
9058   outs() << " fpu_rsrv2 " << format("0x%04" PRIx32, fpu.fpu_rsrv2);  in Print_x86_float_state_t()
9059   outs() << " fpu_dp " << format("0x%08" PRIx32, fpu.fpu_dp);  in Print_x86_float_state_t()
9060   outs() << " fpu_ds " << format("0x%04" PRIx32, fpu.fpu_ds) << "\n";  in Print_x86_float_state_t()
9061   outs() << "\t    fpu_rsrv3 " << format("0x%04" PRIx32, fpu.fpu_rsrv3);  in Print_x86_float_state_t()
9062   outs() << " fpu_mxcsr " << format("0x%08" PRIx32, fpu.fpu_mxcsr);  in Print_x86_float_state_t()
9063   outs() << " fpu_mxcsrmask " << format("0x%08" PRIx32, fpu.fpu_mxcsrmask);  in Print_x86_float_state_t()
9066   Print_mmst_reg(fpu.fpu_stmm0);  in Print_x86_float_state_t()
9068   Print_mmst_reg(fpu.fpu_stmm1);  in Print_x86_float_state_t()
9070   Print_mmst_reg(fpu.fpu_stmm2);  in Print_x86_float_state_t()
9072   Print_mmst_reg(fpu.fpu_stmm3);  in Print_x86_float_state_t()
9074   Print_mmst_reg(fpu.fpu_stmm4);  in Print_x86_float_state_t()
9076   Print_mmst_reg(fpu.fpu_stmm5);  in Print_x86_float_state_t()
9078   Print_mmst_reg(fpu.fpu_stmm6);  in Print_x86_float_state_t()
9080   Print_mmst_reg(fpu.fpu_stmm7);  in Print_x86_float_state_t()
9082   Print_xmm_reg(fpu.fpu_xmm0);  in Print_x86_float_state_t()
9084   Print_xmm_reg(fpu.fpu_xmm1);  in Print_x86_float_state_t()
9086   Print_xmm_reg(fpu.fpu_xmm2);  in Print_x86_float_state_t()
9088   Print_xmm_reg(fpu.fpu_xmm3);  in Print_x86_float_state_t()
9090   Print_xmm_reg(fpu.fpu_xmm4);  in Print_x86_float_state_t()
9092   Print_xmm_reg(fpu.fpu_xmm5);  in Print_x86_float_state_t()
9094   Print_xmm_reg(fpu.fpu_xmm6);  in Print_x86_float_state_t()
9096   Print_xmm_reg(fpu.fpu_xmm7);  in Print_x86_float_state_t()
9098   Print_xmm_reg(fpu.fpu_xmm8);  in Print_x86_float_state_t()
9100   Print_xmm_reg(fpu.fpu_xmm9);  in Print_x86_float_state_t()
9102   Print_xmm_reg(fpu.fpu_xmm10);  in Print_x86_float_state_t()
9104   Print_xmm_reg(fpu.fpu_xmm11);  in Print_x86_float_state_t()
9106   Print_xmm_reg(fpu.fpu_xmm12);  in Print_x86_float_state_t()
9108   Print_xmm_reg(fpu.fpu_xmm13);  in Print_x86_float_state_t()
9110   Print_xmm_reg(fpu.fpu_xmm14);  in Print_x86_float_state_t()
9112   Print_xmm_reg(fpu.fpu_xmm15);  in Print_x86_float_state_t()
9117       outs() << format("%02" PRIx32, fpu.fpu_rsrv4[f * g]) << " ";  in Print_x86_float_state_t()
9120   outs() << "\t    fpu_reserved1 " << format("0x%08" PRIx32, fpu.fpu_reserved1);  in Print_x86_float_state_t()