Lines Matching refs:setflags
1166 if setflags then in EmulateADDRdSPImm()
1227 if setflags then in EmulateMOVRdSP()
1289 if setflags then in EmulateMOVRdRm()
1302 bool setflags; in EmulateMOVRdRm() local
1307 setflags = false; in EmulateMOVRdRm()
1314 setflags = true; in EmulateMOVRdRm()
1321 setflags = BitIsSet(opcode, 20); in EmulateMOVRdRm()
1323 if (setflags && (BadReg(Rd) || BadReg(Rm))) in EmulateMOVRdRm()
1327 if (!setflags && (Rd == 15 || Rm == 15 || (Rd == 13 && Rm == 13))) in EmulateMOVRdRm()
1333 setflags = BitIsSet(opcode, 20); in EmulateMOVRdRm()
1337 if (Rd == 15 && setflags) in EmulateMOVRdRm()
1357 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags)) in EmulateMOVRdRm()
1378 if setflags then in EmulateMOVRdImm()
1393 bool setflags; in EmulateMOVRdImm() local
1397 setflags = !InITBlock(); in EmulateMOVRdImm()
1405 setflags = BitIsSet(opcode, 20); in EmulateMOVRdImm()
1416 setflags = false; in EmulateMOVRdImm()
1432 setflags = BitIsSet(opcode, 20); in EmulateMOVRdImm()
1437 if ((Rd == 15) && setflags) in EmulateMOVRdImm()
1445 setflags = false; in EmulateMOVRdImm()
1465 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMOVRdImm()
1488 if setflags then in EmulateMUL()
1501 bool setflags; in EmulateMUL() local
1510 setflags = !InITBlock(); in EmulateMUL()
1523 setflags = false; in EmulateMUL()
1536 setflags = BitIsSet(opcode, 20); in EmulateMUL()
1586 if (setflags) { in EmulateMUL()
1620 if setflags then in EmulateMVNImm()
1632 bool setflags; in EmulateMVNImm() local
1636 setflags = BitIsSet(opcode, 20); in EmulateMVNImm()
1641 setflags = BitIsSet(opcode, 20); in EmulateMVNImm()
1646 if (Rd == 15 && setflags) in EmulateMVNImm()
1659 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNImm()
1681 if setflags then in EmulateMVNReg()
1694 bool setflags; in EmulateMVNReg() local
1700 setflags = !InITBlock(); in EmulateMVNReg()
1709 setflags = BitIsSet(opcode, 20); in EmulateMVNReg()
1718 setflags = BitIsSet(opcode, 20); in EmulateMVNReg()
1740 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNReg()
1849 if setflags then in EmulateADDSPImm()
1865 bool setflags; in EmulateADDSPImm() local
1871 setflags = false; in EmulateADDSPImm()
1878 setflags = false; in EmulateADDSPImm()
1886 setflags = Bit32(opcode, 20); in EmulateADDSPImm()
1889 if (d == 15 && setflags == 1) in EmulateADDSPImm()
1893 if (d == 15 && setflags == 0) in EmulateADDSPImm()
1901 setflags = false; in EmulateADDSPImm()
1938 if (!WriteCoreRegOptionalFlags(context, res.result, d, setflags, in EmulateADDSPImm()
1961 if setflags then in EmulateADDSPRm()
2291 if setflags then in EmulateSUBR7IPImm()
2341 if setflags then in EmulateSUBIPSPImm()
2394 if setflags then in EmulateSUBSPImm()
2409 bool setflags; in EmulateSUBSPImm() local
2414 setflags = false; in EmulateSUBSPImm()
2419 setflags = BitIsSet(opcode, 20); in EmulateSUBSPImm()
2421 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2423 if (Rd == 15 && !setflags) in EmulateSUBSPImm()
2428 setflags = false; in EmulateSUBSPImm()
2435 setflags = BitIsSet(opcode, 20); in EmulateSUBSPImm()
2440 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2460 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBSPImm()
3030 if setflags then in EmulateADDImmThumb()
3042 bool setflags; in EmulateADDImmThumb() local
3053 setflags = !InITBlock(); in EmulateADDImmThumb()
3063 setflags = !InITBlock(); in EmulateADDImmThumb()
3074 setflags = BitIsSet(opcode, 20); in EmulateADDImmThumb()
3093 setflags = false; in EmulateADDImmThumb()
3135 if (!WriteCoreRegOptionalFlags(context, res.result, d, setflags, in EmulateADDImmThumb()
3156 if setflags then in EmulateADDImmARM()
3169 bool setflags; in EmulateADDImmARM() local
3174 setflags = BitIsSet(opcode, 20); in EmulateADDImmARM()
3200 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDImmARM()
3222 if setflags then in EmulateADDReg()
3235 bool setflags; in EmulateADDReg() local
3241 setflags = !InITBlock(); in EmulateADDReg()
3248 setflags = false; in EmulateADDReg()
3260 setflags = BitIsSet(opcode, 20); in EmulateADDReg()
3290 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDReg()
3551 if setflags then in EmulateASRImm()
3575 if setflags then in EmulateASRReg()
3599 if setflags then in EmulateLSLImm()
3622 if setflags then in EmulateLSLReg()
3647 if setflags then in EmulateLSRImm()
3670 if setflags then in EmulateLSRReg()
3695 if setflags then in EmulateRORImm()
3719 if setflags then in EmulateRORReg()
3745 if setflags then in EmulateRRX()
3771 bool setflags; in EmulateShiftImm() local
3791 setflags = !InITBlock(); in EmulateShiftImm()
3802 setflags = BitIsSet(opcode, 20); in EmulateShiftImm()
3810 setflags = BitIsSet(opcode, 20); in EmulateShiftImm()
3839 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftImm()
3861 bool setflags; in EmulateShiftReg() local
3867 setflags = !InITBlock(); in EmulateShiftReg()
3873 setflags = BitIsSet(opcode, 20); in EmulateShiftReg()
3881 setflags = BitIsSet(opcode, 20); in EmulateShiftReg()
3910 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftReg()
5821 if setflags then in EmulateADCImm()
5834 bool setflags; in EmulateADCImm() local
5839 setflags = BitIsSet(opcode, 20); in EmulateADCImm()
5847 setflags = BitIsSet(opcode, 20); in EmulateADCImm()
5850 if (Rd == 15 && setflags) in EmulateADCImm()
5868 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCImm()
5891 if setflags then in EmulateADCReg()
5904 bool setflags; in EmulateADCReg() local
5909 setflags = !InITBlock(); in EmulateADCReg()
5917 setflags = BitIsSet(opcode, 20); in EmulateADCReg()
5926 setflags = BitIsSet(opcode, 20); in EmulateADCReg()
5929 if (Rd == 15 && setflags) in EmulateADCReg()
5955 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCReg()
6038 if setflags then in EmulateANDImm()
6051 bool setflags; in EmulateANDImm() local
6057 setflags = BitIsSet(opcode, 20); in EmulateANDImm()
6062 if (Rd == 15 && setflags) in EmulateANDImm()
6064 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateANDImm()
6070 setflags = BitIsSet(opcode, 20); in EmulateANDImm()
6075 if (Rd == 15 && setflags) in EmulateANDImm()
6093 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDImm()
6114 if setflags then in EmulateANDReg()
6127 bool setflags; in EmulateANDReg() local
6133 setflags = !InITBlock(); in EmulateANDReg()
6141 setflags = BitIsSet(opcode, 20); in EmulateANDReg()
6144 if (Rd == 15 && setflags) in EmulateANDReg()
6146 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateANDReg()
6153 setflags = BitIsSet(opcode, 20); in EmulateANDReg()
6156 if (Rd == 15 && setflags) in EmulateANDReg()
6182 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDReg()
6203 if setflags then in EmulateBICImm()
6216 bool setflags; in EmulateBICImm() local
6222 setflags = BitIsSet(opcode, 20); in EmulateBICImm()
6232 setflags = BitIsSet(opcode, 20); in EmulateBICImm()
6239 if (Rd == 15 && setflags) in EmulateBICImm()
6257 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICImm()
6279 if setflags then in EmulateBICReg()
6292 bool setflags; in EmulateBICReg() local
6298 setflags = !InITBlock(); in EmulateBICReg()
6306 setflags = BitIsSet(opcode, 20); in EmulateBICReg()
6315 setflags = BitIsSet(opcode, 20); in EmulateBICReg()
6320 if (Rd == 15 && setflags) in EmulateBICReg()
6346 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICReg()
8845 if setflags then in EmulateEORImm()
8858 bool setflags; in EmulateEORImm() local
8864 setflags = BitIsSet(opcode, 20); in EmulateEORImm()
8869 if (Rd == 15 && setflags) in EmulateEORImm()
8871 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateEORImm()
8877 setflags = BitIsSet(opcode, 20); in EmulateEORImm()
8884 if (Rd == 15 && setflags) in EmulateEORImm()
8902 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORImm()
8924 if setflags then in EmulateEORReg()
8937 bool setflags; in EmulateEORReg() local
8943 setflags = !InITBlock(); in EmulateEORReg()
8951 setflags = BitIsSet(opcode, 20); in EmulateEORReg()
8954 if (Rd == 15 && setflags) in EmulateEORReg()
8956 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateEORReg()
8963 setflags = BitIsSet(opcode, 20); in EmulateEORReg()
8968 if (Rd == 15 && setflags) in EmulateEORReg()
8994 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORReg()
9014 if setflags then in EmulateORRImm()
9027 bool setflags; in EmulateORRImm() local
9033 setflags = BitIsSet(opcode, 20); in EmulateORRImm()
9046 setflags = BitIsSet(opcode, 20); in EmulateORRImm()
9051 if (Rd == 15 && setflags) in EmulateORRImm()
9069 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRImm()
9091 if setflags then in EmulateORRReg()
9104 bool setflags; in EmulateORRReg() local
9110 setflags = !InITBlock(); in EmulateORRReg()
9118 setflags = BitIsSet(opcode, 20); in EmulateORRReg()
9130 setflags = BitIsSet(opcode, 20); in EmulateORRReg()
9133 if (Rd == 15 && setflags) in EmulateORRReg()
9159 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRReg()
9179 if setflags then in EmulateRSBImm()
9190 bool setflags; in EmulateRSBImm() local
9197 setflags = !InITBlock(); in EmulateRSBImm()
9203 setflags = BitIsSet(opcode, 20); in EmulateRSBImm()
9211 setflags = BitIsSet(opcode, 20); in EmulateRSBImm()
9216 if (Rd == 15 && setflags) in EmulateRSBImm()
9233 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBImm()
9252 if setflags then in EmulateRSBReg()
9264 bool setflags; in EmulateRSBReg() local
9272 setflags = BitIsSet(opcode, 20); in EmulateRSBReg()
9282 setflags = BitIsSet(opcode, 20); in EmulateRSBReg()
9287 if (Rd == 15 && setflags) in EmulateRSBReg()
9311 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBReg()
9330 if setflags then in EmulateRSCImm()
9341 bool setflags; in EmulateRSCImm() local
9348 setflags = BitIsSet(opcode, 20); in EmulateRSCImm()
9353 if (Rd == 15 && setflags) in EmulateRSCImm()
9370 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCImm()
9390 if setflags then in EmulateRSCReg()
9402 bool setflags; in EmulateRSCReg() local
9410 setflags = BitIsSet(opcode, 20); in EmulateRSCReg()
9415 if (Rd == 15 && setflags) in EmulateRSCReg()
9439 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCReg()
9459 if setflags then in EmulateSBCImm()
9470 bool setflags; in EmulateSBCImm() local
9477 setflags = BitIsSet(opcode, 20); in EmulateSBCImm()
9485 setflags = BitIsSet(opcode, 20); in EmulateSBCImm()
9490 if (Rd == 15 && setflags) in EmulateSBCImm()
9507 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCImm()
9528 if setflags then in EmulateSBCReg()
9540 bool setflags; in EmulateSBCReg() local
9547 setflags = !InITBlock(); in EmulateSBCReg()
9555 setflags = BitIsSet(opcode, 20); in EmulateSBCReg()
9564 setflags = BitIsSet(opcode, 20); in EmulateSBCReg()
9569 if (Rd == 15 && setflags) in EmulateSBCReg()
9593 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCReg()
9608 if setflags then in EmulateSUBImmThumb()
9619 bool setflags; in EmulateSUBImmThumb() local
9626 setflags = !InITBlock(); in EmulateSUBImmThumb()
9631 setflags = !InITBlock(); in EmulateSUBImmThumb()
9637 setflags = BitIsSet(opcode, 20); in EmulateSUBImmThumb()
9641 if (Rd == 15 && setflags) in EmulateSUBImmThumb()
9649 if (Rd == 13 || (Rd == 15 && !setflags) || Rn == 15) in EmulateSUBImmThumb()
9655 setflags = BitIsSet(opcode, 20); in EmulateSUBImmThumb()
9683 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmThumb()
9701 if setflags then in EmulateSUBImmARM()
9713 bool setflags; in EmulateSUBImmARM() local
9720 setflags = BitIsSet(opcode, 20); in EmulateSUBImmARM()
9724 if (Rn == 15 && !setflags) in EmulateSUBImmARM()
9733 if (Rd == 15 && setflags) in EmulateSUBImmARM()
9757 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmARM()
10032 if setflags then in EmulateSUBSPReg()
10044 bool setflags; in EmulateSUBSPReg() local
10053 setflags = BitIsSet(opcode, 20); in EmulateSUBSPReg()
10072 setflags = BitIsSet(opcode, 20); in EmulateSUBSPReg()
10076 if (d == 15 && setflags) in EmulateSUBSPReg()
10111 if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags, in EmulateSUBSPReg()
10128 if setflags then in EmulateADDRegShift()
10142 bool setflags; in EmulateADDRegShift() local
10154 setflags = BitIsSet(opcode, 20); in EmulateADDRegShift()
10208 if (setflags) in EmulateADDRegShift()
10226 if setflags then in EmulateSUBReg()
10239 bool setflags; in EmulateSUBReg() local
10249 setflags = !InITBlock(); in EmulateSUBReg()
10262 setflags = BitIsSet(opcode, 20); in EmulateSUBReg()
10265 if (d == 15 && setflags == 1) in EmulateSUBReg()
10289 setflags = BitIsSet(opcode, 20); in EmulateSUBReg()
10293 if ((d == 15) && setflags) in EmulateSUBReg()
10338 if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags, in EmulateSUBReg()
14297 Context &context, const uint32_t result, const uint32_t Rd, bool setflags, in WriteCoreRegOptionalFlags() argument
14320 if (setflags) in WriteCoreRegOptionalFlags()