Lines Matching refs:encoding
53 reg_info.encoding = eEncodingVector; in GetARMDWARFRegisterInfo()
59 reg_info.encoding = eEncodingIEEE754; in GetARMDWARFRegisterInfo()
63 reg_info.encoding = eEncodingIEEE754; in GetARMDWARFRegisterInfo()
67 reg_info.encoding = eEncodingIEEE754; in GetARMDWARFRegisterInfo()
71 reg_info.encoding = eEncodingUint; in GetARMDWARFRegisterInfo()
905 const ARMEncoding encoding) { in EmulatePUSH() argument
941 switch (encoding) { in EmulatePUSH()
1027 const ARMEncoding encoding) { in EmulatePOP() argument
1056 switch (encoding) { in EmulatePOP()
1155 const ARMEncoding encoding) { in EmulateADDRdSPImm() argument
1182 switch (encoding) { in EmulateADDRdSPImm()
1216 const ARMEncoding encoding) { in EmulateMOVRdSP() argument
1242 switch (encoding) { in EmulateMOVRdSP()
1271 const ARMEncoding encoding) { in EmulateMOVLowHigh() argument
1272 return EmulateMOVRdRm(opcode, encoding); in EmulateMOVLowHigh()
1278 const ARMEncoding encoding) { in EmulateMOVRdRm() argument
1303 switch (encoding) { in EmulateMOVRdRm()
1338 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateMOVRdRm()
1367 const ARMEncoding encoding) { in EmulateMOVRdImm() argument
1394 switch (encoding) { in EmulateMOVRdImm()
1438 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateMOVRdImm()
1480 const ARMEncoding encoding) { in EmulateMUL() argument
1504 switch (encoding) { in EmulateMUL()
1609 const ARMEncoding encoding) { in EmulateMVNImm() argument
1633 switch (encoding) { in EmulateMVNImm()
1647 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateMVNImm()
1669 const ARMEncoding encoding) { in EmulateMVNReg() argument
1696 switch (encoding) { in EmulateMVNReg()
1750 const ARMEncoding encoding) { in EmulateLDRRtPCRelative() argument
1790 switch (encoding) { in EmulateLDRRtPCRelative()
1838 const ARMEncoding encoding) { in EmulateADDSPImm() argument
1866 switch (encoding) { in EmulateADDSPImm()
1949 const ARMEncoding encoding) { in EmulateADDSPRm() argument
1976 switch (encoding) { in EmulateADDSPRm()
2010 const ARMEncoding encoding) { in EmulateBLXImmediate() argument
2040 switch (encoding) { in EmulateBLXImmediate()
2114 const ARMEncoding encoding) { in EmulateBLXRm() argument
2141 switch (encoding) { in EmulateBLXRm()
2179 const ARMEncoding encoding) { in EmulateBXRm() argument
2193 switch (encoding) { in EmulateBXRm()
2227 const ARMEncoding encoding) { in EmulateBXJRm() argument
2247 switch (encoding) { in EmulateBXJRm()
2280 const ARMEncoding encoding) { in EmulateSUBR7IPImm() argument
2305 switch (encoding) { in EmulateSUBR7IPImm()
2330 const ARMEncoding encoding) { in EmulateSUBIPSPImm() argument
2355 switch (encoding) { in EmulateSUBIPSPImm()
2383 const ARMEncoding encoding) { in EmulateSUBSPImm() argument
2411 switch (encoding) { in EmulateSUBSPImm()
2441 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBSPImm()
2469 const ARMEncoding encoding) { in EmulateSTRRtSP() argument
2496 switch (encoding) { in EmulateSTRRtSP()
2563 const ARMEncoding encoding) { in EmulateVPUSH() argument
2594 switch (encoding) { in EmulateVPUSH()
2656 const ARMEncoding encoding) { in EmulateVPOP() argument
2686 switch (encoding) { in EmulateVPOP()
2747 const ARMEncoding encoding) { in EmulateSVC() argument
2766 switch (encoding) { in EmulateSVC()
2793 const ARMEncoding encoding) { in EmulateIT() argument
2805 const ARMEncoding encoding) { in EmulateNop() argument
2812 const ARMEncoding encoding) { in EmulateB() argument
2832 switch (encoding) { in EmulateB()
2896 const ARMEncoding encoding) { in EmulateCB() argument
2920 switch (encoding) { in EmulateCB()
2950 const ARMEncoding encoding) { in EmulateTB() argument
2969 switch (encoding) { in EmulateTB()
3024 const ARMEncoding encoding) { in EmulateADDImmThumb() argument
3047 switch (encoding) { in EmulateADDImmThumb()
3146 const ARMEncoding encoding) { in EmulateADDImmARM() argument
3170 switch (encoding) { in EmulateADDImmARM()
3211 const ARMEncoding encoding) { in EmulateADDReg() argument
3236 switch (encoding) { in EmulateADDReg()
3300 const ARMEncoding encoding) { in EmulateCMNImm() argument
3316 switch (encoding) { in EmulateCMNImm()
3347 const ARMEncoding encoding) { in EmulateCMNReg() argument
3366 switch (encoding) { in EmulateCMNReg()
3413 const ARMEncoding encoding) { in EmulateCMPImm() argument
3429 switch (encoding) { in EmulateCMPImm()
3464 const ARMEncoding encoding) { in EmulateCMPReg() argument
3483 switch (encoding) { in EmulateCMPReg()
3541 const ARMEncoding encoding) { in EmulateASRImm() argument
3558 return EmulateShiftImm(opcode, encoding, SRType_ASR); in EmulateASRImm()
3567 const ARMEncoding encoding) { in EmulateASRReg() argument
3582 return EmulateShiftReg(opcode, encoding, SRType_ASR); in EmulateASRReg()
3589 const ARMEncoding encoding) { in EmulateLSLImm() argument
3606 return EmulateShiftImm(opcode, encoding, SRType_LSL); in EmulateLSLImm()
3614 const ARMEncoding encoding) { in EmulateLSLReg() argument
3629 return EmulateShiftReg(opcode, encoding, SRType_LSL); in EmulateLSLReg()
3637 const ARMEncoding encoding) { in EmulateLSRImm() argument
3654 return EmulateShiftImm(opcode, encoding, SRType_LSR); in EmulateLSRImm()
3662 const ARMEncoding encoding) { in EmulateLSRReg() argument
3677 return EmulateShiftReg(opcode, encoding, SRType_LSR); in EmulateLSRReg()
3685 const ARMEncoding encoding) { in EmulateRORImm() argument
3702 return EmulateShiftImm(opcode, encoding, SRType_ROR); in EmulateRORImm()
3711 const ARMEncoding encoding) { in EmulateRORReg() argument
3726 return EmulateShiftReg(opcode, encoding, SRType_ROR); in EmulateRORReg()
3735 const ARMEncoding encoding) { in EmulateRRX() argument
3752 return EmulateShiftImm(opcode, encoding, SRType_RRX); in EmulateRRX()
3756 const ARMEncoding encoding, in EmulateShiftImm() argument
3775 ARMEncoding use_encoding = encoding; in EmulateShiftImm()
3846 const ARMEncoding encoding, in EmulateShiftReg() argument
3862 switch (encoding) { in EmulateShiftReg()
3920 const ARMEncoding encoding) { in EmulateLDM() argument
3944 switch (encoding) { in EmulateLDM()
4063 const ARMEncoding encoding) { in EmulateLDMDA() argument
4090 switch (encoding) { in EmulateLDMDA()
4180 const ARMEncoding encoding) { in EmulateLDMDB() argument
4204 switch (encoding) { in EmulateLDMDB()
4319 const ARMEncoding encoding) { in EmulateLDMIB() argument
4342 switch (encoding) { in EmulateLDMIB()
4431 const ARMEncoding encoding) { in EmulateLDRRtRnImm() argument
4459 switch (encoding) { in EmulateLDRRtRnImm()
4594 const ARMEncoding encoding) { in EmulateSTM() argument
4622 switch (encoding) { in EmulateSTM()
4746 const ARMEncoding encoding) { in EmulateSTMDA() argument
4775 switch (encoding) { in EmulateSTMDA()
4868 const ARMEncoding encoding) { in EmulateSTMDB() argument
4897 switch (encoding) { in EmulateSTMDB()
5017 const ARMEncoding encoding) { in EmulateSTMIB() argument
5046 switch (encoding) { in EmulateSTMIB()
5139 const ARMEncoding encoding) { in EmulateSTRThumb() argument
5164 switch (encoding) { in EmulateSTRThumb()
5306 const ARMEncoding encoding) { in EmulateSTRRegister() argument
5339 switch (encoding) { in EmulateSTRRegister()
5496 const ARMEncoding encoding) { in EmulateSTRBThumb() argument
5516 switch (encoding) { in EmulateSTRBThumb()
5633 const ARMEncoding encoding) { in EmulateSTRHRegister() argument
5660 switch (encoding) { in EmulateSTRHRegister()
5811 const ARMEncoding encoding) { in EmulateADCImm() argument
5835 switch (encoding) { in EmulateADCImm()
5851 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateADCImm()
5880 const ARMEncoding encoding) { in EmulateADCReg() argument
5905 switch (encoding) { in EmulateADCReg()
5930 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateADCReg()
5965 const ARMEncoding encoding) { in EmulateADR() argument
5983 switch (encoding) { in EmulateADR()
6028 const ARMEncoding encoding) { in EmulateANDImm() argument
6053 switch (encoding) { in EmulateANDImm()
6076 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateANDImm()
6103 const ARMEncoding encoding) { in EmulateANDReg() argument
6129 switch (encoding) { in EmulateANDReg()
6157 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateANDReg()
6193 const ARMEncoding encoding) { in EmulateBICImm() argument
6218 switch (encoding) { in EmulateBICImm()
6240 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateBICImm()
6268 const ARMEncoding encoding) { in EmulateBICReg() argument
6294 switch (encoding) { in EmulateBICReg()
6321 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateBICReg()
6357 const ARMEncoding encoding) { in EmulateLDRImmediateARM() argument
6385 switch (encoding) { in EmulateLDRImmediateARM()
6494 const ARMEncoding encoding) { in EmulateLDRRegister() argument
6528 switch (encoding) { in EmulateLDRRegister()
6701 const ARMEncoding encoding) { in EmulateLDRBImmediate() argument
6722 switch (encoding) { in EmulateLDRBImmediate()
6848 const ARMEncoding encoding) { in EmulateLDRBLiteral() argument
6863 switch (encoding) { in EmulateLDRBLiteral()
6929 const ARMEncoding encoding) { in EmulateLDRBRegister() argument
6953 switch (encoding) { in EmulateLDRBRegister()
7091 const ARMEncoding encoding) { in EmulateLDRHImmediate() argument
7116 switch (encoding) { in EmulateLDRHImmediate()
7238 const ARMEncoding encoding) { in EmulateLDRHLiteral() argument
7259 switch (encoding) { in EmulateLDRHLiteral()
7342 const ARMEncoding encoding) { in EmulateLDRHRegister() argument
7370 switch (encoding) { in EmulateLDRHRegister()
7518 const ARMEncoding encoding) { in EmulateLDRSBImmediate() argument
7539 switch (encoding) { in EmulateLDRSBImmediate()
7667 const ARMEncoding encoding) { in EmulateLDRSBLiteral() argument
7684 switch (encoding) { in EmulateLDRSBLiteral()
7755 const ARMEncoding encoding) { in EmulateLDRSBRegister() argument
7779 switch (encoding) { in EmulateLDRSBRegister()
7915 const ARMEncoding encoding) { in EmulateLDRSHImmediate() argument
7940 switch (encoding) { in EmulateLDRSHImmediate()
8074 const ARMEncoding encoding) { in EmulateLDRSHLiteral() argument
8095 switch (encoding) { in EmulateLDRSHLiteral()
8175 const ARMEncoding encoding) { in EmulateLDRSHRegister() argument
8203 switch (encoding) { in EmulateLDRSHRegister()
8355 const ARMEncoding encoding) { in EmulateSXTB() argument
8371 switch (encoding) { in EmulateSXTB()
8440 const ARMEncoding encoding) { in EmulateSXTH() argument
8456 switch (encoding) { in EmulateSXTH()
8525 const ARMEncoding encoding) { in EmulateUXTB() argument
8541 switch (encoding) { in EmulateUXTB()
8608 const ARMEncoding encoding) { in EmulateUXTH() argument
8623 switch (encoding) { in EmulateUXTH()
8689 const ARMEncoding encoding) { in EmulateRFE() argument
8712 switch (encoding) { in EmulateRFE()
8835 const ARMEncoding encoding) { in EmulateEORImm() argument
8860 switch (encoding) { in EmulateEORImm()
8885 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateEORImm()
8913 const ARMEncoding encoding) { in EmulateEORReg() argument
8939 switch (encoding) { in EmulateEORReg()
8969 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateEORReg()
9004 const ARMEncoding encoding) { in EmulateORRImm() argument
9029 switch (encoding) { in EmulateORRImm()
9052 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateORRImm()
9080 const ARMEncoding encoding) { in EmulateORRReg() argument
9106 switch (encoding) { in EmulateORRReg()
9134 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateORRReg()
9169 const ARMEncoding encoding) { in EmulateRSBImm() argument
9193 switch (encoding) { in EmulateRSBImm()
9217 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSBImm()
9241 const ARMEncoding encoding) { in EmulateRSBReg() argument
9267 switch (encoding) { in EmulateRSBReg()
9288 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSBReg()
9320 const ARMEncoding encoding) { in EmulateRSCImm() argument
9344 switch (encoding) { in EmulateRSCImm()
9354 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSCImm()
9379 const ARMEncoding encoding) { in EmulateRSCReg() argument
9405 switch (encoding) { in EmulateRSCReg()
9416 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSCReg()
9449 const ARMEncoding encoding) { in EmulateSBCImm() argument
9473 switch (encoding) { in EmulateSBCImm()
9491 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSBCImm()
9517 const ARMEncoding encoding) { in EmulateSBCReg() argument
9543 switch (encoding) { in EmulateSBCReg()
9570 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSBCReg()
9601 const ARMEncoding encoding) { in EmulateSUBImmThumb() argument
9622 switch (encoding) { in EmulateSUBImmThumb()
9691 const ARMEncoding encoding) { in EmulateSUBImmARM() argument
9716 switch (encoding) { in EmulateSUBImmARM()
9734 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBImmARM()
9768 const ARMEncoding encoding) { in EmulateTEQImm() argument
9787 switch (encoding) { in EmulateTEQImm()
9827 const ARMEncoding encoding) { in EmulateTEQReg() argument
9847 switch (encoding) { in EmulateTEQReg()
9893 const ARMEncoding encoding) { in EmulateTSTImm() argument
9912 switch (encoding) { in EmulateTSTImm()
9952 const ARMEncoding encoding) { in EmulateTSTReg() argument
9972 switch (encoding) { in EmulateTSTReg()
10022 const ARMEncoding encoding) { in EmulateSUBSPReg() argument
10048 switch (encoding) { in EmulateSUBSPReg()
10077 EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBSPReg()
10120 const ARMEncoding encoding) { in EmulateADDRegShift() argument
10145 switch (encoding) { in EmulateADDRegShift()
10216 const ARMEncoding encoding) { in EmulateSUBReg() argument
10243 switch (encoding) { in EmulateSUBReg()
10294 EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBReg()
10350 const ARMEncoding encoding) { in EmulateSTREX() argument
10371 switch (encoding) { in EmulateSTREX()
10461 const ARMEncoding encoding) { in EmulateSTRBImmARM() argument
10481 switch (encoding) { in EmulateSTRBImmARM()
10554 const ARMEncoding encoding) { in EmulateSTRImmARM() argument
10576 switch (encoding) { in EmulateSTRImmARM()
10663 const ARMEncoding encoding) { in EmulateLDRDImmediate() argument
10685 switch (encoding) { in EmulateLDRDImmediate()
10811 const ARMEncoding encoding) { in EmulateLDRDRegister() argument
10833 switch (encoding) { in EmulateLDRDRegister()
10940 const ARMEncoding encoding) { in EmulateSTRDImm() argument
10962 switch (encoding) { in EmulateSTRDImm()
11093 const ARMEncoding encoding) { in EmulateSTRDReg() argument
11115 switch (encoding) { in EmulateSTRDReg()
11231 const ARMEncoding encoding) { in EmulateVLDM() argument
11258 switch (encoding) { in EmulateVLDM()
11424 const ARMEncoding encoding) { in EmulateVSTM() argument
11452 switch (encoding) { in EmulateVSTM()
11629 ARMEncoding encoding) { in EmulateVLDR() argument
11653 switch (encoding) { in EmulateVLDR()
11756 ARMEncoding encoding) { in EmulateVSTR() argument
11779 switch (encoding) { in EmulateVSTR()
11889 ARMEncoding encoding) { in EmulateVLD1Multiple() argument
11915 switch (encoding) { in EmulateVLD1Multiple()
12047 const ARMEncoding encoding) { in EmulateVLD1Single() argument
12069 switch (encoding) { in EmulateVLD1Single()
12076 return EmulateVLD1SingleAll(opcode, encoding); in EmulateVLD1Single()
12224 ARMEncoding encoding) { in EmulateVST1Multiple() argument
12250 switch (encoding) { in EmulateVST1Multiple()
12380 ARMEncoding encoding) { in EmulateVST1Single() argument
12402 switch (encoding) { in EmulateVST1Single()
12539 const ARMEncoding encoding) { in EmulateVLD1SingleAll() argument
12563 switch (encoding) { in EmulateVLD1SingleAll()
12670 const ARMEncoding encoding) { in EmulateSUBSPcLrEtc() argument
12705 switch (encoding) { in EmulateSUBSPcLrEtc()
14390 opcode_data->encoding); in EvaluateInstruction()