Lines Matching refs:Rd
1180 uint32_t Rd; // the destination register in EmulateADDRdSPImm() local
1184 Rd = 7; in EmulateADDRdSPImm()
1188 Rd = Bits32(opcode, 15, 12); in EmulateADDRdSPImm()
1198 if (Rd == GetFramePointerRegisterNumber()) in EmulateADDRdSPImm()
1206 if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + Rd, in EmulateADDRdSPImm()
1241 uint32_t Rd; // the destination register in EmulateMOVRdSP() local
1244 Rd = 7; in EmulateMOVRdSP()
1247 Rd = 12; in EmulateMOVRdSP()
1254 if (Rd == GetFramePointerRegisterNumber()) in EmulateMOVRdSP()
1262 if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + Rd, sp)) in EmulateMOVRdSP()
1301 uint32_t Rd; // the destination register in EmulateMOVRdRm() local
1305 Rd = Bit32(opcode, 7) << 3 | Bits32(opcode, 2, 0); in EmulateMOVRdRm()
1308 if (Rd == 15 && InITBlock() && !LastInITBlock()) in EmulateMOVRdRm()
1312 Rd = Bits32(opcode, 2, 0); in EmulateMOVRdRm()
1319 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdRm()
1323 if (setflags && (BadReg(Rd) || BadReg(Rm))) in EmulateMOVRdRm()
1327 if (!setflags && (Rd == 15 || Rm == 15 || (Rd == 13 && Rm == 13))) in EmulateMOVRdRm()
1331 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdRm()
1337 if (Rd == 15 && setflags) in EmulateMOVRdRm()
1349 if (Rd == 13) in EmulateMOVRdRm()
1357 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags)) in EmulateMOVRdRm()
1387 uint32_t Rd; // the destination register in EmulateMOVRdImm() local
1396 Rd = Bits32(opcode, 10, 8); in EmulateMOVRdImm()
1404 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdImm()
1407 if (BadReg(Rd)) in EmulateMOVRdImm()
1415 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdImm()
1424 if (BadReg(Rd)) in EmulateMOVRdImm()
1431 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdImm()
1437 if ((Rd == 15) && setflags) in EmulateMOVRdImm()
1444 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdImm()
1451 if (Rd == 15) in EmulateMOVRdImm()
1465 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMOVRdImm()
1629 uint32_t Rd; // the destination register in EmulateMVNImm() local
1635 Rd = Bits32(opcode, 11, 8); in EmulateMVNImm()
1640 Rd = Bits32(opcode, 15, 12); in EmulateMVNImm()
1646 if (Rd == 15 && setflags) in EmulateMVNImm()
1659 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNImm()
1691 uint32_t Rd; // the destination register in EmulateMVNReg() local
1698 Rd = Bits32(opcode, 2, 0); in EmulateMVNReg()
1707 Rd = Bits32(opcode, 11, 8); in EmulateMVNReg()
1712 if (BadReg(Rd) || BadReg(Rm)) in EmulateMVNReg()
1716 Rd = Bits32(opcode, 15, 12); in EmulateMVNReg()
1740 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNReg()
2408 uint32_t Rd; in EmulateSUBSPImm() local
2413 Rd = 13; in EmulateSUBSPImm()
2418 Rd = Bits32(opcode, 11, 8); in EmulateSUBSPImm()
2421 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2423 if (Rd == 15 && !setflags) in EmulateSUBSPImm()
2427 Rd = Bits32(opcode, 11, 8); in EmulateSUBSPImm()
2430 if (Rd == 15) in EmulateSUBSPImm()
2434 Rd = Bits32(opcode, 15, 12); in EmulateSUBSPImm()
2440 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2449 if (Rd == 13) { in EmulateSUBSPImm()
2460 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBSPImm()
3166 uint32_t Rd, Rn; in EmulateADDImmARM() local
3172 Rd = Bits32(opcode, 15, 12); in EmulateADDImmARM()
3189 if (Rd == 13) in EmulateADDImmARM()
3191 else if (Rd == GetFramePointerRegisterNumber()) in EmulateADDImmARM()
3200 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDImmARM()
3232 uint32_t Rd, Rn, Rm; in EmulateADDReg() local
3238 Rd = Bits32(opcode, 2, 0); in EmulateADDReg()
3246 Rd = Rn = Bit32(opcode, 7) << 3 | Bits32(opcode, 2, 0); in EmulateADDReg()
3253 if (Rd == 15 && InITBlock() && !LastInITBlock()) in EmulateADDReg()
3257 Rd = Bits32(opcode, 15, 12); in EmulateADDReg()
3290 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDReg()
3767 uint32_t Rd; // the destination register in EmulateShiftImm() local
3789 Rd = Bits32(opcode, 2, 0); in EmulateShiftImm()
3800 Rd = Bits32(opcode, 11, 8); in EmulateShiftImm()
3804 if (BadReg(Rd) || BadReg(Rm)) in EmulateShiftImm()
3808 Rd = Bits32(opcode, 15, 12); in EmulateShiftImm()
3839 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftImm()
3856 uint32_t Rd; // the destination register in EmulateShiftReg() local
3864 Rd = Bits32(opcode, 2, 0); in EmulateShiftReg()
3865 Rn = Rd; in EmulateShiftReg()
3870 Rd = Bits32(opcode, 11, 8); in EmulateShiftReg()
3874 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateShiftReg()
3878 Rd = Bits32(opcode, 15, 12); in EmulateShiftReg()
3882 if (Rd == 15 || Rn == 15 || Rm == 15) in EmulateShiftReg()
3910 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftReg()
5831 uint32_t Rd, Rn; in EmulateADCImm() local
5837 Rd = Bits32(opcode, 11, 8); in EmulateADCImm()
5841 if (BadReg(Rd) || BadReg(Rn)) in EmulateADCImm()
5845 Rd = Bits32(opcode, 15, 12); in EmulateADCImm()
5850 if (Rd == 15 && setflags) in EmulateADCImm()
5868 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCImm()
5901 uint32_t Rd, Rn, Rm; in EmulateADCReg() local
5907 Rd = Rn = Bits32(opcode, 2, 0); in EmulateADCReg()
5914 Rd = Bits32(opcode, 11, 8); in EmulateADCReg()
5919 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateADCReg()
5923 Rd = Bits32(opcode, 15, 12); in EmulateADCReg()
5929 if (Rd == 15 && setflags) in EmulateADCReg()
5955 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCReg()
5980 uint32_t Rd; in EmulateADR() local
5985 Rd = Bits32(opcode, 10, 8); in EmulateADR()
5991 Rd = Bits32(opcode, 11, 8); in EmulateADR()
5994 if (BadReg(Rd)) in EmulateADR()
5999 Rd = Bits32(opcode, 15, 12); in EmulateADR()
6018 if (!WriteCoreReg(context, result, Rd)) in EmulateADR()
6048 uint32_t Rd, Rn; in EmulateANDImm() local
6055 Rd = Bits32(opcode, 11, 8); in EmulateANDImm()
6062 if (Rd == 15 && setflags) in EmulateANDImm()
6064 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateANDImm()
6068 Rd = Bits32(opcode, 15, 12); in EmulateANDImm()
6075 if (Rd == 15 && setflags) in EmulateANDImm()
6093 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDImm()
6124 uint32_t Rd, Rn, Rm; in EmulateANDReg() local
6131 Rd = Rn = Bits32(opcode, 2, 0); in EmulateANDReg()
6138 Rd = Bits32(opcode, 11, 8); in EmulateANDReg()
6144 if (Rd == 15 && setflags) in EmulateANDReg()
6146 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateANDReg()
6150 Rd = Bits32(opcode, 15, 12); in EmulateANDReg()
6156 if (Rd == 15 && setflags) in EmulateANDReg()
6182 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDReg()
6213 uint32_t Rd, Rn; in EmulateBICImm() local
6220 Rd = Bits32(opcode, 11, 8); in EmulateBICImm()
6226 if (BadReg(Rd) || BadReg(Rn)) in EmulateBICImm()
6230 Rd = Bits32(opcode, 15, 12); in EmulateBICImm()
6239 if (Rd == 15 && setflags) in EmulateBICImm()
6257 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICImm()
6289 uint32_t Rd, Rn, Rm; in EmulateBICReg() local
6296 Rd = Rn = Bits32(opcode, 2, 0); in EmulateBICReg()
6303 Rd = Bits32(opcode, 11, 8); in EmulateBICReg()
6308 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateBICReg()
6312 Rd = Bits32(opcode, 15, 12); in EmulateBICReg()
6320 if (Rd == 15 && setflags) in EmulateBICReg()
6346 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICReg()
8855 uint32_t Rd, Rn; in EmulateEORImm() local
8862 Rd = Bits32(opcode, 11, 8); in EmulateEORImm()
8869 if (Rd == 15 && setflags) in EmulateEORImm()
8871 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateEORImm()
8875 Rd = Bits32(opcode, 15, 12); in EmulateEORImm()
8884 if (Rd == 15 && setflags) in EmulateEORImm()
8902 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORImm()
8934 uint32_t Rd, Rn, Rm; in EmulateEORReg() local
8941 Rd = Rn = Bits32(opcode, 2, 0); in EmulateEORReg()
8948 Rd = Bits32(opcode, 11, 8); in EmulateEORReg()
8954 if (Rd == 15 && setflags) in EmulateEORReg()
8956 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateEORReg()
8960 Rd = Bits32(opcode, 15, 12); in EmulateEORReg()
8968 if (Rd == 15 && setflags) in EmulateEORReg()
8994 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORReg()
9024 uint32_t Rd, Rn; in EmulateORRImm() local
9031 Rd = Bits32(opcode, 11, 8); in EmulateORRImm()
9040 if (BadReg(Rd) || Rn == 13) in EmulateORRImm()
9044 Rd = Bits32(opcode, 15, 12); in EmulateORRImm()
9051 if (Rd == 15 && setflags) in EmulateORRImm()
9069 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRImm()
9101 uint32_t Rd, Rn, Rm; in EmulateORRReg() local
9108 Rd = Rn = Bits32(opcode, 2, 0); in EmulateORRReg()
9115 Rd = Bits32(opcode, 11, 8); in EmulateORRReg()
9123 if (BadReg(Rd) || Rn == 13 || BadReg(Rm)) in EmulateORRReg()
9127 Rd = Bits32(opcode, 15, 12); in EmulateORRReg()
9133 if (Rd == 15 && setflags) in EmulateORRReg()
9159 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRReg()
9188 uint32_t Rd; // the destination register in EmulateRSBImm() local
9195 Rd = Bits32(opcode, 2, 0); in EmulateRSBImm()
9201 Rd = Bits32(opcode, 11, 8); in EmulateRSBImm()
9205 if (BadReg(Rd) || BadReg(Rn)) in EmulateRSBImm()
9209 Rd = Bits32(opcode, 15, 12); in EmulateRSBImm()
9216 if (Rd == 15 && setflags) in EmulateRSBImm()
9233 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBImm()
9261 uint32_t Rd; // the destination register in EmulateRSBReg() local
9269 Rd = Bits32(opcode, 11, 8); in EmulateRSBReg()
9275 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateRSBReg()
9279 Rd = Bits32(opcode, 15, 12); in EmulateRSBReg()
9287 if (Rd == 15 && setflags) in EmulateRSBReg()
9311 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBReg()
9339 uint32_t Rd; // the destination register in EmulateRSCImm() local
9346 Rd = Bits32(opcode, 15, 12); in EmulateRSCImm()
9353 if (Rd == 15 && setflags) in EmulateRSCImm()
9370 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCImm()
9399 uint32_t Rd; // the destination register in EmulateRSCReg() local
9407 Rd = Bits32(opcode, 15, 12); in EmulateRSCReg()
9415 if (Rd == 15 && setflags) in EmulateRSCReg()
9439 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCReg()
9468 uint32_t Rd; // the destination register in EmulateSBCImm() local
9475 Rd = Bits32(opcode, 11, 8); in EmulateSBCImm()
9479 if (BadReg(Rd) || BadReg(Rn)) in EmulateSBCImm()
9483 Rd = Bits32(opcode, 15, 12); in EmulateSBCImm()
9490 if (Rd == 15 && setflags) in EmulateSBCImm()
9507 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCImm()
9537 uint32_t Rd; // the destination register in EmulateSBCReg() local
9545 Rd = Rn = Bits32(opcode, 2, 0); in EmulateSBCReg()
9552 Rd = Bits32(opcode, 11, 8); in EmulateSBCReg()
9557 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateSBCReg()
9561 Rd = Bits32(opcode, 15, 12); in EmulateSBCReg()
9569 if (Rd == 15 && setflags) in EmulateSBCReg()
9593 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCReg()
9617 uint32_t Rd; // the destination register in EmulateSUBImmThumb() local
9624 Rd = Bits32(opcode, 2, 0); in EmulateSUBImmThumb()
9630 Rd = Rn = Bits32(opcode, 10, 8); in EmulateSUBImmThumb()
9635 Rd = Bits32(opcode, 11, 8); in EmulateSUBImmThumb()
9641 if (Rd == 15 && setflags) in EmulateSUBImmThumb()
9649 if (Rd == 13 || (Rd == 15 && !setflags) || Rn == 15) in EmulateSUBImmThumb()
9653 Rd = Bits32(opcode, 11, 8); in EmulateSUBImmThumb()
9666 if (BadReg(Rd)) in EmulateSUBImmThumb()
9683 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmThumb()
9711 uint32_t Rd; // the destination register in EmulateSUBImmARM() local
9718 Rd = Bits32(opcode, 15, 12); in EmulateSUBImmARM()
9733 if (Rd == 15 && setflags) in EmulateSUBImmARM()
9747 if (Rd == 13) in EmulateSUBImmARM()
9757 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmARM()
14297 Context &context, const uint32_t result, const uint32_t Rd, bool setflags, in WriteCoreRegOptionalFlags() argument
14299 if (Rd == 15) { in WriteCoreRegOptionalFlags()
14305 switch (Rd) { in WriteCoreRegOptionalFlags()
14316 reg_num = dwarf_r0 + Rd; in WriteCoreRegOptionalFlags()