Lines Matching refs:IsRegCall
2255 bool IsVectorCall, bool IsRegCall) const;
2259 bool IsVectorCall, bool IsRegCall) const;
3579 bool IsRegCall = CallingConv == llvm::CallingConv::X86_RegCall; in computeInfo() local
3582 unsigned FreeIntRegs = IsRegCall ? 11 : 6; in computeInfo()
3583 unsigned FreeSSERegs = IsRegCall ? 16 : 8; in computeInfo()
3587 if (IsRegCall && FI.getReturnType()->getTypePtr()->isRecordType() && in computeInfo()
3597 } else if (IsRegCall && FI.getReturnType()->getAs<ComplexType>()) { in computeInfo()
3625 if (IsRegCall && it->type->isStructureOrClassType()) in computeInfo()
3904 bool IsRegCall) const { in classify()
3932 if ((IsVectorCall || IsRegCall) && in classify()
3934 if (IsRegCall) { in classify()
4015 bool IsRegCall) const { in computeVectorCallArgs()
4021 I.info = classify(I.type, FreeSSERegs, false, IsVectorCall, IsRegCall); in computeVectorCallArgs()
4027 IsVectorCall, IsRegCall); in computeVectorCallArgs()
4040 bool IsRegCall = FI.getCallingConvention() == llvm::CallingConv::X86_RegCall; in computeInfo() local
4046 } else if (IsRegCall) { in computeInfo()
4053 IsVectorCall, IsRegCall); in computeInfo()
4058 } else if (IsRegCall) { in computeInfo()
4064 computeVectorCallArgs(FI, FreeSSERegs, IsVectorCall, IsRegCall); in computeInfo()
4067 I.info = classify(I.type, FreeSSERegs, false, IsVectorCall, IsRegCall); in computeInfo()