Lines Matching refs:getZeroVector

5294 static SDValue getZeroVector(MVT VT, const X86Subtarget &Subtarget,  in getZeroVector()  function
5406 SDValue Res = ZeroNewElements ? getZeroVector(VT, Subtarget, DAG, dl) in widenSubVector()
5508 getZeroVector(WideOpVT, Subtarget, DAG, dl), in insert1BitVector()
5531 getZeroVector(WideOpVT, Subtarget, DAG, dl), in insert1BitVector()
5569 getZeroVector(WideOpVT, Subtarget, DAG, dl), in insert1BitVector()
5680 ? getZeroVector(VT, Subtarget, DAG, SDLoc(V2)) : DAG.getUNDEF(VT); in getShuffleVectorZeroOrUndef()
6887 V = getZeroVector(VT, Subtarget, DAG, dl); in LowerBuildVectorAsInsert()
6926 V = getZeroVector(MVT::v8i16, Subtarget, DAG, dl); in LowerBuildVectorv16i8()
7059 SDValue VZero = getZeroVector(VT, Subtarget, DAG, SDLoc(Op)); in LowerBuildVectorv4x32()
8531 return getZeroVector(VT, Subtarget, DAG, DL); in materializeVectorConstant()
8647 getZeroVector(IndicesVT.getSimpleVT(), Subtarget, DAG, DL), in createVariablePermute()
9003 SDValue ZeroVec = getZeroVector(ShufVT, Subtarget, DAG, dl); in LowerBUILD_VECTOR()
9147 Ops[i] = getZeroVector(VT, Subtarget, DAG, dl); in LowerBUILD_VECTOR()
9274 SDValue Vec = NumZero ? getZeroVector(ResVT, Subtarget, DAG, dl) in LowerAVXCONCAT_VECTORS()
9382 SDValue Vec = NumZero ? getZeroVector(ResVT, Subtarget, DAG, dl) in LowerCONCAT_VECTORSvXi1()
9906 SDValue ZeroVector = getZeroVector(VT, Subtarget, DAG, DL); in lowerVectorShuffleToEXPAND()
9972 V2 = Zero2 ? getZeroVector(VT, Subtarget, DAG, DL) : V1; in matchVectorShuffleWithUNPCK()
9973 V1 = Zero1 ? getZeroVector(VT, Subtarget, DAG, DL) : V1; in matchVectorShuffleWithUNPCK()
10323 V1 = getZeroVector(VT, Subtarget, DAG, DL); in lowerVectorShuffleAsBlend()
10325 V2 = getZeroVector(VT, Subtarget, DAG, DL); in lowerVectorShuffleAsBlend()
11307 : getZeroVector(InputVT, Subtarget, DAG, DL); in lowerVectorShuffleAsSpecificZeroOrAnyExtend()
13646 SDValue Zero = getZeroVector(MVT::v16i8, Subtarget, DAG, DL); in lowerV16I8VectorShuffle()
14015 getZeroVector(VT, Subtarget, DAG, DL), LoV, in lowerV2X128VectorShuffle()
15324 getZeroVector(VT, Subtarget, DAG, DL), LoV, in lowerV4X128VectorShuffle()
15886 getZeroVector(VT, Subtarget, DAG, DL), in lower1BitVectorShuffle()
16070 return getZeroVector(VT, Subtarget, DAG, DL); in lowerVectorShuffle()
16121 V2 = getZeroVector(NewVT, Subtarget, DAG, DL); in lowerVectorShuffle()
16555 SDValue CstVector = IsZeroElt ? getZeroVector(VT, Subtarget, DAG, dl) in LowerINSERT_VECTOR_ELT()
16660 return getZeroVector(OpVT, Subtarget, DAG, dl); in LowerSCALAR_TO_VECTOR()
21427 PreservedSrc = getZeroVector(VT, Subtarget, DAG, dl); in getVectorMaskingNode()
21460 PreservedSrc = getZeroVector(VT, Subtarget, DAG, dl); in getScalarMaskingNode()
21969 Src1 : getZeroVector(VT, Subtarget, DAG, dl); in LowerINTRINSIC_WO_CHAIN()
22316 Src = getZeroVector(Op.getSimpleValueType(), Subtarget, DAG, dl); in getAVX2GatherNode()
22350 Src = getZeroVector(Op.getSimpleValueType(), Subtarget, DAG, dl); in getGatherNode()
30685 V1 = ForceV1Zero ? getZeroVector(MaskVT, Subtarget, DAG, DL) : V1; in matchBinaryPermuteVectorShuffle()
30686 V2 = ForceV2Zero ? getZeroVector(MaskVT, Subtarget, DAG, DL) : V2; in matchBinaryPermuteVectorShuffle()
30716 V1 = ForceV1Zero ? getZeroVector(MaskVT, Subtarget, DAG, DL) : V1; in matchBinaryPermuteVectorShuffle()
30717 V2 = ForceV2Zero ? getZeroVector(MaskVT, Subtarget, DAG, DL) : V2; in matchBinaryPermuteVectorShuffle()
30766 return getZeroVector(MaskVT, Subtarget, DAG, DL); in matchBinaryPermuteVectorShuffle()
31066 SDValue Zero = getZeroVector(MaskVT, Subtarget, DAG, DL); in combineX86ShuffleChain()
31504 return getZeroVector(Root.getSimpleValueType(), Subtarget, DAG, in combineX86ShufflesRecursively()
32569 Op, getZeroVector(VT.getSimpleVT(), Subtarget, TLO.DAG, SDLoc(Op))); in SimplifyDemandedVectorEltsForTargetNode()
38827 return getZeroVector(V.getSimpleValueType(), Subtarget, DAG, SDLoc(V)); in getNullFPConstForNullVal()
41196 return getZeroVector(OpVT, Subtarget, DAG, dl); in combineInsertSubvector()
41204 getZeroVector(OpVT, Subtarget, DAG, dl), in combineInsertSubvector()
41221 getZeroVector(OpVT, Subtarget, DAG, dl), in combineInsertSubvector()
41318 getZeroVector(OpVT, Subtarget, DAG, dl), SubVec2, in combineInsertSubvector()
41382 return getZeroVector(OpVT, Subtarget, DAG, SDLoc(N)); in combineExtractSubvector()