Lines Matching refs:SubVec
5479 SDValue SubVec = Op.getOperand(1); in insert1BitVector() local
5486 if (SubVec.isUndef()) in insert1BitVector()
5509 SubVec, Idx); in insert1BitVector()
5513 MVT SubVecVT = SubVec.getSimpleValueType(); in insert1BitVector()
5530 SubVec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, WideOpVT, in insert1BitVector()
5532 SubVec, ZeroIdx); in insert1BitVector()
5533 Op = DAG.getNode(ISD::OR, dl, WideOpVT, Vec, SubVec); in insert1BitVector()
5537 SubVec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, WideOpVT, in insert1BitVector()
5538 Undef, SubVec, ZeroIdx); in insert1BitVector()
5542 SubVec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, SubVec, in insert1BitVector()
5544 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, SubVec, ZeroIdx); in insert1BitVector()
5552 SubVec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, SubVec, in insert1BitVector()
5555 SubVec = DAG.getNode(X86ISD::KSHIFTR, dl, WideOpVT, SubVec, in insert1BitVector()
5557 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, SubVec, ZeroIdx); in insert1BitVector()
5562 SubVec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, SubVec, in insert1BitVector()
5580 Op = DAG.getNode(ISD::OR, dl, WideOpVT, Vec, SubVec); in insert1BitVector()
5594 Op = DAG.getNode(ISD::XOR, dl, WideOpVT, Op, SubVec); in insert1BitVector()
9249 SDValue SubVec = Op.getOperand(i); in LowerAVXCONCAT_VECTORS() local
9250 if (SubVec.isUndef()) in LowerAVXCONCAT_VECTORS()
9252 if (ISD::isBuildVectorAllZeros(SubVec.getNode())) in LowerAVXCONCAT_VECTORS()
9367 SDValue SubVec = Op.getOperand(i); in LowerCONCAT_VECTORSvXi1() local
9368 if (SubVec.isUndef()) in LowerCONCAT_VECTORSvXi1()
9370 if (ISD::isBuildVectorAllZeros(SubVec.getNode())) in LowerCONCAT_VECTORSvXi1()
9387 SDValue SubVec = Op.getOperand(Idx); in LowerCONCAT_VECTORSvXi1() local
9388 unsigned SubVecNumElts = SubVec.getSimpleValueType().getVectorNumElements(); in LowerCONCAT_VECTORSvXi1()
9389 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Vec, SubVec, in LowerCONCAT_VECTORSvXi1()
14040 SDValue SubVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, in lowerV2X128VectorShuffle() local
14043 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VT, V1, SubVec, in lowerV2X128VectorShuffle()
15335 SDValue SubVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, in lowerV4X128VectorShuffle() local
15338 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VT, V1, SubVec, in lowerV4X128VectorShuffle()
37855 SDValue SubVec = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, in combineStore() local
37859 DAG.getStore(St->getChain(), dl, SubVec, Ptr, St->getPointerInfo(), in combineStore()
41188 SDValue SubVec = N->getOperand(1); in combineInsertSubvector() local
41191 MVT SubVecVT = SubVec.getSimpleValueType(); in combineInsertSubvector()
41195 if (ISD::isBuildVectorAllZeros(SubVec.getNode())) in combineInsertSubvector()
41200 if (SubVec.getOpcode() == ISD::INSERT_SUBVECTOR && in combineInsertSubvector()
41201 ISD::isBuildVectorAllZeros(SubVec.getOperand(0).getNode())) { in combineInsertSubvector()
41202 unsigned Idx2Val = SubVec.getConstantOperandVal(2); in combineInsertSubvector()
41205 SubVec.getOperand(1), in combineInsertSubvector()
41213 if (SubVec.getOpcode() == ISD::EXTRACT_SUBVECTOR && IdxVal == 0 && in combineInsertSubvector()
41214 SubVec.getConstantOperandVal(1) == 0 && in combineInsertSubvector()
41215 SubVec.getOperand(0).getOpcode() == ISD::INSERT_SUBVECTOR) { in combineInsertSubvector()
41216 SDValue Ins = SubVec.getOperand(0); in combineInsertSubvector()
41229 if (!IsI1Vector && SubVec.getOpcode() == ISD::BITCAST && IdxVal == 0) { in combineInsertSubvector()
41230 MVT CastVT = SubVec.getOperand(0).getSimpleValueType(); in combineInsertSubvector()
41235 SubVec.getOperand(0), N->getOperand(2)); in combineInsertSubvector()
41246 if (SubVec.getOpcode() == ISD::EXTRACT_SUBVECTOR && in combineInsertSubvector()
41247 SubVec.getOperand(0).getSimpleValueType() == OpVT && in combineInsertSubvector()
41249 int ExtIdxVal = SubVec.getConstantOperandVal(1); in combineInsertSubvector()
41261 return DAG.getVectorShuffle(OpVT, dl, Vec, SubVec.getOperand(0), Mask); in combineInsertSubvector()
41295 SDValue Ops[] = {SubVec2, SubVec}; in combineInsertSubvector()
41304 if (SubVec2 == SubVec && ISD::isNormalLoad(Ld) && Vec.hasOneUse()) in combineInsertSubvector()
41305 return DAG.getNode(X86ISD::SUBV_BROADCAST, dl, OpVT, SubVec); in combineInsertSubvector()
41309 if (SubVec.getOpcode() == X86ISD::SUBV_BROADCAST && SubVec == SubVec2) in combineInsertSubvector()
41311 SubVec.getOperand(0)); in combineInsertSubvector()
41316 if (ISD::isBuildVectorAllZeros(SubVec.getNode())) in combineInsertSubvector()
41328 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, Vec, SubVec, in combineInsertSubvector()