Lines Matching refs:ShiftVT
10921 static int matchVectorShuffleAsShift(MVT &ShiftVT, unsigned &Opcode, in matchVectorShuffleAsShift() argument
10959 ShiftVT = ByteShift ? MVT::getVectorVT(MVT::i8, SizeInBits / 8) in matchVectorShuffleAsShift()
10992 MVT ShiftVT; in lowerVectorShuffleAsShift() local
10998 ShiftVT, Opcode, VT.getScalarSizeInBits(), Mask, 0, Zeroable, Subtarget); in lowerVectorShuffleAsShift()
11003 matchVectorShuffleAsShift(ShiftVT, Opcode, VT.getScalarSizeInBits(), in lowerVectorShuffleAsShift()
11011 assert(DAG.getTargetLoweringInfo().isTypeLegal(ShiftVT) && in lowerVectorShuffleAsShift()
11013 V = DAG.getBitcast(ShiftVT, V); in lowerVectorShuffleAsShift()
11014 V = DAG.getNode(Opcode, DL, ShiftVT, V, in lowerVectorShuffleAsShift()
24182 MVT ShiftVT = MVT::getVectorVT(MVT::i16, NumElts / 2); in LowerScalarImmediateShift() local
24205 SDValue SHL = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, ShiftVT, R, in LowerScalarImmediateShift()
24214 SDValue SRL = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ShiftVT, R, in LowerScalarImmediateShift()