Lines Matching refs:RegMask
2784 uint32_t *RegMask) const { in LowerCallResult()
2802 if (RegMask) { in LowerCallResult()
2805 RegMask[*SubRegs / 32] &= ~(1u << (*SubRegs % 32)); in LowerCallResult()
4071 uint32_t *RegMask = nullptr; in LowerCall() local
4079 RegMask = MF.allocateRegMask(); in LowerCall()
4081 memcpy(RegMask, Mask, sizeof(RegMask[0]) * RegMaskSize); in LowerCall()
4088 RegMask[*SubRegs / 32] &= ~(1u << (*SubRegs % 32)); in LowerCall()
4091 Ops.push_back(DAG.getRegisterMask(RegMask)); in LowerCall()
4153 InVals, RegMask); in LowerCall()
28677 const uint32_t *RegMask = in EmitLoweredSegAlloca() local
28684 .addRegMask(RegMask) in EmitLoweredSegAlloca()
28692 .addRegMask(RegMask) in EmitLoweredSegAlloca()
28701 .addRegMask(RegMask) in EmitLoweredSegAlloca()
28828 const uint32_t *RegMask = in EmitLoweredTLSCall() local
28843 MIB.addReg(X86::RAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()
28855 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()
28867 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()