Lines Matching refs:InVT
5631 EVT InVT = In.getValueType(); in getExtendInVec() local
5632 assert(VT.isVector() && InVT.isVector() && "Expected vector VTs."); in getExtendInVec()
5636 if (InVT.getSizeInBits() > 128) { in getExtendInVec()
5637 assert(VT.getSizeInBits() == InVT.getSizeInBits() && in getExtendInVec()
5639 unsigned Scale = VT.getScalarSizeInBits() / InVT.getScalarSizeInBits(); in getExtendInVec()
5642 InVT = In.getValueType(); in getExtendInVec()
5645 if (VT.getVectorNumElements() == InVT.getVectorNumElements()) in getExtendInVec()
17967 MVT InVT = In.getSimpleValueType(); in LowerAVXExtend() local
17970 assert(VT.isVector() && InVT.isVector() && "Expected vector type"); in LowerAVXExtend()
17977 assert((InVT.getVectorElementType() == MVT::i8 || in LowerAVXExtend()
17978 InVT.getVectorElementType() == MVT::i16 || in LowerAVXExtend()
17979 InVT.getVectorElementType() == MVT::i32) && in LowerAVXExtend()
17983 if (InVT == MVT::v8i8) { in LowerAVXExtend()
18014 SDValue ZeroVec = DAG.getConstant(0, dl, InVT); in LowerAVXExtend()
18015 SDValue Undef = DAG.getUNDEF(InVT); in LowerAVXExtend()
18017 SDValue OpHi = getUnpackh(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef); in LowerAVXExtend()
18042 MVT InVT = In.getSimpleValueType(); in LowerZERO_EXTEND_Mask() local
18043 assert(InVT.getVectorElementType() == MVT::i1 && "Unexpected input type!"); in LowerZERO_EXTEND_Mask()
18069 InVT = MVT::getVectorVT(MVT::i1, NumElts); in LowerZERO_EXTEND_Mask()
18070 In = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, InVT, DAG.getUNDEF(InVT), in LowerZERO_EXTEND_Mask()
18148 EVT InVT = MVT::i16, OutVT = MVT::i8; in truncateVectorWithPACK() local
18151 InVT = MVT::i32; in truncateVectorWithPACK()
18157 InVT = EVT::getVectorVT(Ctx, InVT, 128 / InVT.getSizeInBits()); in truncateVectorWithPACK()
18159 In = DAG.getBitcast(InVT, In); in truncateVectorWithPACK()
18171 InVT = EVT::getVectorVT(Ctx, InVT, SubSizeInBits / InVT.getSizeInBits()); in truncateVectorWithPACK()
18176 Lo = DAG.getBitcast(InVT, Lo); in truncateVectorWithPACK()
18177 Hi = DAG.getBitcast(InVT, Hi); in truncateVectorWithPACK()
18185 Lo = DAG.getBitcast(InVT, Lo); in truncateVectorWithPACK()
18186 Hi = DAG.getBitcast(InVT, Hi); in truncateVectorWithPACK()
18220 MVT InVT = In.getSimpleValueType(); in LowerTruncateVecI1() local
18225 unsigned ShiftInx = InVT.getScalarSizeInBits() - 1; in LowerTruncateVecI1()
18226 if (InVT.getScalarSizeInBits() <= 16) { in LowerTruncateVecI1()
18229 if (DAG.ComputeNumSignBits(In) < InVT.getScalarSizeInBits()) { in LowerTruncateVecI1()
18232 MVT ExtVT = MVT::getVectorVT(MVT::i16, InVT.getSizeInBits()/16); in LowerTruncateVecI1()
18236 In = DAG.getBitcast(InVT, In); in LowerTruncateVecI1()
18238 return DAG.getSetCC(DL, VT, DAG.getConstant(0, DL, InVT), in LowerTruncateVecI1()
18242 assert((InVT.is256BitVector() || InVT.is128BitVector()) && in LowerTruncateVecI1()
18244 unsigned NumElts = InVT.getVectorNumElements(); in LowerTruncateVecI1()
18256 if (InVT == MVT::v16i8) { in LowerTruncateVecI1()
18258 InVT = MVT::v16i16; in LowerTruncateVecI1()
18259 In = DAG.getNode(ISD::SIGN_EXTEND, DL, InVT, In); in LowerTruncateVecI1()
18275 InVT = ExtVT; in LowerTruncateVecI1()
18276 ShiftInx = InVT.getScalarSizeInBits() - 1; in LowerTruncateVecI1()
18279 if (DAG.ComputeNumSignBits(In) < InVT.getScalarSizeInBits()) { in LowerTruncateVecI1()
18281 In = DAG.getNode(ISD::SHL, DL, InVT, In, in LowerTruncateVecI1()
18282 DAG.getConstant(ShiftInx, DL, InVT)); in LowerTruncateVecI1()
18286 return DAG.getSetCC(DL, VT, DAG.getConstant(0, DL, InVT), In, ISD::SETGT); in LowerTruncateVecI1()
18287 return DAG.getSetCC(DL, VT, In, DAG.getConstant(0, DL, InVT), ISD::SETNE); in LowerTruncateVecI1()
18294 MVT InVT = In.getSimpleValueType(); in LowerTRUNCATE() local
18295 unsigned InNumEltBits = InVT.getScalarSizeInBits(); in LowerTRUNCATE()
18297 assert(VT.getVectorNumElements() == InVT.getVectorNumElements() && in LowerTRUNCATE()
18301 if (!DAG.getTargetLoweringInfo().isTypeLegal(InVT)) in LowerTRUNCATE()
18313 if (InVT != MVT::v16i16 || Subtarget.hasBWI() || in LowerTRUNCATE()
18337 if ((VT == MVT::v4i32) && (InVT == MVT::v4i64)) { in LowerTRUNCATE()
18357 if ((VT == MVT::v8i16) && (InVT == MVT::v8i32)) { in LowerTRUNCATE()
18402 if (VT == MVT::v16i8 && InVT == MVT::v16i16) { in LowerTRUNCATE()
18404 In = DAG.getNode(ISD::AND, DL, InVT, In, DAG.getConstant(255, DL, InVT)); in LowerTRUNCATE()
18414 assert(VT.is128BitVector() && InVT.is256BitVector() && "Unexpected types!"); in LowerTRUNCATE()
20225 MVT InVT = In.getSimpleValueType(); in LowerSIGN_EXTEND_Mask() local
20226 assert(InVT.getVectorElementType() == MVT::i1 && "Unexpected input type!"); in LowerSIGN_EXTEND_Mask()
20246 InVT = MVT::getVectorVT(MVT::i1, NumElts); in LowerSIGN_EXTEND_Mask()
20247 In = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, InVT, DAG.getUNDEF(InVT), in LowerSIGN_EXTEND_Mask()
20280 MVT InVT = In.getSimpleValueType(); in LowerANY_EXTEND() local
20282 if (InVT.getVectorElementType() == MVT::i1) in LowerANY_EXTEND()
20298 MVT InVT = In.getSimpleValueType(); in LowerEXTEND_VECTOR_INREG() local
20301 MVT InSVT = InVT.getVectorElementType(); in LowerEXTEND_VECTOR_INREG()
20319 if (InVT.getSizeInBits() > 128) { in LowerEXTEND_VECTOR_INREG()
20324 InVT = In.getSimpleValueType(); in LowerEXTEND_VECTOR_INREG()
20333 if (InVT.getVectorNumElements() != NumElts) in LowerEXTEND_VECTOR_INREG()
20350 unsigned NumSrcElts = InVT.getVectorNumElements(); in LowerEXTEND_VECTOR_INREG()
20356 SDValue Hi = DAG.getVectorShuffle(InVT, dl, In, DAG.getUNDEF(InVT), HiMask); in LowerEXTEND_VECTOR_INREG()
20363 assert(VT.is128BitVector() && InVT.is128BitVector() && "Unexpected VTs"); in LowerEXTEND_VECTOR_INREG()
20371 if (InVT != MVT::v4i32) { in LowerEXTEND_VECTOR_INREG()
20377 unsigned InNumElts = InVT.getVectorNumElements(); in LowerEXTEND_VECTOR_INREG()
20386 Curr = DAG.getVectorShuffle(InVT, dl, In, In, Mask); in LowerEXTEND_VECTOR_INREG()
20409 MVT InVT = In.getSimpleValueType(); in LowerSIGN_EXTEND() local
20412 if (InVT.getVectorElementType() == MVT::i1) in LowerSIGN_EXTEND()
20415 assert(VT.isVector() && InVT.isVector() && "Expected vector type"); in LowerSIGN_EXTEND()
20422 assert((InVT.getVectorElementType() == MVT::i8 || in LowerSIGN_EXTEND()
20423 InVT.getVectorElementType() == MVT::i16 || in LowerSIGN_EXTEND()
20424 InVT.getVectorElementType() == MVT::i32) && in LowerSIGN_EXTEND()
20428 if (InVT == MVT::v8i8) { in LowerSIGN_EXTEND()
20454 unsigned NumElems = InVT.getVectorNumElements(); in LowerSIGN_EXTEND()
20459 SDValue OpHi = DAG.getVectorShuffle(InVT, dl, In, In, ShufMask); in LowerSIGN_EXTEND()
25309 MVT InVT = V.getSimpleValueType(); in getPMOVMSKB() local
25311 if (InVT == MVT::v32i8 && !Subtarget.hasInt256()) { in getPMOVMSKB()
25858 MVT InVT = InOp.getSimpleValueType(); in ExtendToType() local
25859 if (InVT == NVT) in ExtendToType()
25865 assert(InVT.getVectorElementType() == NVT.getVectorElementType() && in ExtendToType()
25868 unsigned InNumElts = InVT.getVectorNumElements(); in ExtendToType()
25880 InVT = InOp.getSimpleValueType(); in ExtendToType()
25881 InNumElts = InVT.getVectorNumElements(); in ExtendToType()
26372 EVT InVT = N->getOperand(0).getValueType(); in ReplaceNodeResults() local
26375 unsigned NumConcat = 128 / InVT.getSizeInBits(); in ReplaceNodeResults()
26378 InVT.getVectorElementType(), in ReplaceNodeResults()
26379 NumConcat * InVT.getVectorNumElements()); in ReplaceNodeResults()
26384 SmallVector<SDValue, 16> Ops(NumConcat, DAG.getUNDEF(InVT)); in ReplaceNodeResults()
26484 EVT InVT = In.getValueType(); in ReplaceNodeResults() local
26486 unsigned InBits = InVT.getSizeInBits(); in ReplaceNodeResults()
26491 MVT InEltVT = InVT.getSimpleVT().getVectorElementType(); in ReplaceNodeResults()
26509 if (Subtarget.hasAVX512() && isTypeLegal(InVT)) { in ReplaceNodeResults()
26516 if (InVT == MVT::v4i64 && VT == MVT::v4i8 && isTypeLegal(MVT::v8i64)) { in ReplaceNodeResults()
26531 EVT InVT = In.getValueType(); in ReplaceNodeResults() local
26533 (InVT == MVT::v16i16 || InVT == MVT::v32i8)) { in ReplaceNodeResults()
26539 InVT.getVectorElementType(), in ReplaceNodeResults()
26540 InVT.getVectorNumElements() / 2); in ReplaceNodeResults()
26574 EVT InVT = In.getValueType(); in ReplaceNodeResults() local
26576 (InVT == MVT::v4i16 || InVT == MVT::v4i8)) { in ReplaceNodeResults()
26601 if ((VT == MVT::v16i32 || VT == MVT::v8i64) && InVT.is128BitVector()) { in ReplaceNodeResults()
26613 unsigned NumElts = InVT.getVectorNumElements(); in ReplaceNodeResults()
26619 SDValue Hi = DAG.getVectorShuffle(InVT, dl, In, In, ShufMask); in ReplaceNodeResults()
33388 EVT InVT = Zext0.getOperand(0).getValueType(); in createPSADBW() local
33389 unsigned RegSize = std::max(128u, InVT.getSizeInBits()); in createPSADBW()
33393 unsigned NumConcat = RegSize / InVT.getSizeInBits(); in createPSADBW()
33394 SmallVector<SDValue, 16> Ops(NumConcat, DAG.getConstant(0, DL, InVT)); in createPSADBW()
36981 EVT InVT = In.getValueType(); in detectUSatPattern() local
36984 assert(InVT.getScalarSizeInBits() > VT.getScalarSizeInBits() && in detectUSatPattern()
37011 return DAG.getNode(ISD::SMAX, DL, InVT, SMin, In.getOperand(1)); in detectUSatPattern()
37094 EVT InVT = In.getValueType(); in combineTruncateWithSat() local
37095 EVT InSVT = InVT.getScalarType(); in combineTruncateWithSat()
37097 if (TLI.isTypeLegal(InVT) && TLI.isTypeLegal(VT) && in combineTruncateWithSat()
37098 isSATValidOnAVX512Subtarget(InVT, VT, Subtarget)) { in combineTruncateWithSat()
37137 EVT InVT = In.getValueType(); in detectAVGPattern() local
37147 EVT InScalarVT = InVT.getVectorElementType(); in detectAVGPattern()
37209 SDValue VecOnes = DAG.getConstant(1, DL, InVT); in detectAVGPattern()
37210 Operands[1] = DAG.getNode(ISD::SUB, DL, InVT, Operands[1], VecOnes); in detectAVGPattern()
38209 EVT InVT = In.getValueType(); in combineVectorTruncationWithPACKUS() local
38210 EVT InSVT = InVT.getVectorElementType(); in combineVectorTruncationWithPACKUS()
38219 unsigned NumSubRegs = InVT.getSizeInBits() / 128; in combineVectorTruncationWithPACKUS()
38233 In = DAG.getNode(ISD::CONCAT_VECTORS, DL, InVT, SubVecs); in combineVectorTruncationWithPACKUS()
38243 EVT InVT = In.getValueType(); in combineVectorTruncationWithPACKSS() local
38245 In = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, InVT, In, in combineVectorTruncationWithPACKSS()
38265 EVT InVT = In.getValueType(); in combineVectorTruncation() local
38275 EVT InSVT = InVT.getVectorElementType(); in combineVectorTruncation()
38319 MVT InVT = In.getValueType().getSimpleVT(); in combineVectorSignBitsTruncation() local
38320 MVT InSVT = InVT.getScalarType(); in combineVectorSignBitsTruncation()
38374 EVT InVT = Src.getValueType(); in combinePMULH() local
38375 if (InVT.getVectorElementType() != MVT::i32) in combinePMULH()
38531 EVT InVT = Ops[0].getValueType(); in detectPMADDUBSW() local
38532 assert(InVT.getScalarType() == MVT::i8 && in detectPMADDUBSW()
38534 assert(InVT == Ops[1].getValueType() && "Operands' types mismatch"); in detectPMADDUBSW()
38536 InVT.getVectorNumElements() / 2); in detectPMADDUBSW()
39363 EVT InVT = N0.getValueType(); in combineToExtendVectorInReg() local
39364 EVT InSVT = InVT.getScalarType(); in combineToExtendVectorInReg()
39393 DAG.getTargetLoweringInfo().isTypeLegal(InVT)) in combineToExtendVectorInReg()
39399 EVT InVT = N.getValueType(); in combineToExtendVectorInReg() local
39400 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), InVT.getScalarType(), in combineToExtendVectorInReg()
39401 Size / InVT.getScalarSizeInBits()); in combineToExtendVectorInReg()
39402 SmallVector<SDValue, 8> Opnds(Size / InVT.getSizeInBits(), in combineToExtendVectorInReg()
39403 DAG.getUNDEF(InVT)); in combineToExtendVectorInReg()
39414 SDValue Ex = ExtendVecSize(DL, N0, Scale * InVT.getSizeInBits()); in combineToExtendVectorInReg()
39513 EVT InVT = N0.getValueType(); in combineSext() local
39525 if (InVT == MVT::i1 && N0.getOpcode() == ISD::XOR && in combineSext()
40109 EVT InVT = Op0.getValueType(); in combineUIntToFP() local
40114 if (InVT.isVector() && InVT.getScalarSizeInBits() < 32) { in combineUIntToFP()
40117 InVT.getVectorNumElements()); in combineUIntToFP()
40143 EVT InVT = Op0.getValueType(); in combineSIntToFP() local
40148 if (InVT.isVector() && InVT.getScalarSizeInBits() < 32) { in combineSIntToFP()
40151 InVT.getVectorNumElements()); in combineSIntToFP()
40159 if (InVT.getScalarSizeInBits() > 32 && !Subtarget.hasDQI()) { in combineSIntToFP()
40160 unsigned BitWidth = InVT.getScalarSizeInBits(); in combineSIntToFP()
40164 if (InVT.isVector()) in combineSIntToFP()
40166 InVT.getVectorNumElements()); in combineSIntToFP()
40815 EVT InVT = Ops[0].getValueType(); in matchPMADDWD() local
40816 assert(InVT.getScalarType() == MVT::i32 && in matchPMADDWD()
40818 assert(InVT == Ops[1].getValueType() && "Operands' types mismatch"); in matchPMADDWD()
40820 InVT.getVectorNumElements() / 2); in matchPMADDWD()
40822 InVT.getVectorNumElements()); in matchPMADDWD()
40902 EVT InVT = N00.getValueType(); in matchPMADDWD_2() local
40903 if (InVT.getVectorElementType() != MVT::i16 || N01.getValueType() != InVT || in matchPMADDWD_2()
40904 N10.getValueType() != InVT || N11.getValueType() != InVT) in matchPMADDWD_2()
40974 EVT InVT = Ops[0].getValueType(); in matchPMADDWD_2() local
40975 assert(InVT.getScalarType() == MVT::i16 && in matchPMADDWD_2()
40977 assert(InVT == Ops[1].getValueType() && "Operands' types mismatch"); in matchPMADDWD_2()
40979 InVT.getVectorNumElements() / 2); in matchPMADDWD_2()