Lines Matching refs:CurrVT

23309   MVT CurrVT = MVT::getVectorVT(MVT::i8, NumBytes);  in LowerVectorCTLZInRegLUT()  local
23320 SDValue InRegLUT = DAG.getBuildVector(CurrVT, DL, LUTVec); in LowerVectorCTLZInRegLUT()
23327 SDValue Op0 = DAG.getBitcast(CurrVT, Op.getOperand(0)); in LowerVectorCTLZInRegLUT()
23328 SDValue Zero = DAG.getConstant(0, DL, CurrVT); in LowerVectorCTLZInRegLUT()
23330 SDValue NibbleShift = DAG.getConstant(0x4, DL, CurrVT); in LowerVectorCTLZInRegLUT()
23332 SDValue Hi = DAG.getNode(ISD::SRL, DL, CurrVT, Op0, NibbleShift); in LowerVectorCTLZInRegLUT()
23334 if (CurrVT.is512BitVector()) { in LowerVectorCTLZInRegLUT()
23335 MVT MaskVT = MVT::getVectorVT(MVT::i1, CurrVT.getVectorNumElements()); in LowerVectorCTLZInRegLUT()
23337 HiZ = DAG.getNode(ISD::SIGN_EXTEND, DL, CurrVT, HiZ); in LowerVectorCTLZInRegLUT()
23339 HiZ = DAG.getSetCC(DL, CurrVT, Hi, Zero, ISD::SETEQ); in LowerVectorCTLZInRegLUT()
23342 Lo = DAG.getNode(X86ISD::PSHUFB, DL, CurrVT, InRegLUT, Lo); in LowerVectorCTLZInRegLUT()
23343 Hi = DAG.getNode(X86ISD::PSHUFB, DL, CurrVT, InRegLUT, Hi); in LowerVectorCTLZInRegLUT()
23344 Lo = DAG.getNode(ISD::AND, DL, CurrVT, Lo, HiZ); in LowerVectorCTLZInRegLUT()
23345 SDValue Res = DAG.getNode(ISD::ADD, DL, CurrVT, Lo, Hi); in LowerVectorCTLZInRegLUT()
23352 while (CurrVT != VT) { in LowerVectorCTLZInRegLUT()
23353 int CurrScalarSizeInBits = CurrVT.getScalarSizeInBits(); in LowerVectorCTLZInRegLUT()
23354 int CurrNumElts = CurrVT.getVectorNumElements(); in LowerVectorCTLZInRegLUT()
23360 if (CurrVT.is512BitVector()) { in LowerVectorCTLZInRegLUT()
23361 MVT MaskVT = MVT::getVectorVT(MVT::i1, CurrVT.getVectorNumElements()); in LowerVectorCTLZInRegLUT()
23362 HiZ = DAG.getSetCC(DL, MaskVT, DAG.getBitcast(CurrVT, Op0), in LowerVectorCTLZInRegLUT()
23363 DAG.getBitcast(CurrVT, Zero), ISD::SETEQ); in LowerVectorCTLZInRegLUT()
23364 HiZ = DAG.getNode(ISD::SIGN_EXTEND, DL, CurrVT, HiZ); in LowerVectorCTLZInRegLUT()
23366 HiZ = DAG.getSetCC(DL, CurrVT, DAG.getBitcast(CurrVT, Op0), in LowerVectorCTLZInRegLUT()
23367 DAG.getBitcast(CurrVT, Zero), ISD::SETEQ); in LowerVectorCTLZInRegLUT()
23379 CurrVT = NextVT; in LowerVectorCTLZInRegLUT()