Lines Matching refs:StackPtr
49 StackPtr = TRI->getStackRegister(); in X86FrameLowering()
279 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr) in emitSPUpdate()
280 .addReg(StackPtr) in emitSPUpdate()
307 .addReg(StackPtr); in emitSPUpdate()
312 StackPtr, false, 0); in emitSPUpdate()
314 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr), in emitSPUpdate()
315 StackPtr, false, 0); in emitSPUpdate()
380 StackPtr), in BuildStackAdjustment()
381 StackPtr, false, Offset); in BuildStackAdjustment()
387 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in BuildStackAdjustment()
388 .addReg(StackPtr) in BuildStackAdjustment()
424 PI->getOperand(0).getReg() == StackPtr){ in mergeSPUpdates()
425 assert(PI->getOperand(1).getReg() == StackPtr); in mergeSPUpdates()
428 PI->getOperand(0).getReg() == StackPtr && in mergeSPUpdates()
429 PI->getOperand(1).getReg() == StackPtr && in mergeSPUpdates()
437 PI->getOperand(0).getReg() == StackPtr) { in mergeSPUpdates()
438 assert(PI->getOperand(1).getReg() == StackPtr); in mergeSPUpdates()
1086 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16) in emitPrologue()
1137 .addReg(StackPtr) in emitPrologue()
1211 BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign); in emitPrologue()
1293 StackPtr, false, NumBytes - 8); in emitPrologue()
1296 StackPtr, false, NumBytes - 4); in emitPrologue()
1329 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, in emitPrologue()
1339 SPOrEstablisher = StackPtr; in emitPrologue()
1416 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false, in emitPrologue()
1418 .addReg(StackPtr) in emitPrologue()
1692 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), in emitEpilogue()
1697 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in emitEpilogue()
2957 return TRI->getDwarfRegNum(StackPtr, true); in getInitialCFARegister()