Lines Matching refs:BaseReg
68 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand() local
72 if (is16BitMode(STI) && BaseReg.getReg() == 0 && in Is16BitMemOperand()
75 if ((BaseReg.getReg() != 0 && in Is16BitMemOperand()
76 X86MCRegisterClasses[X86::GR16RegClassID].contains(BaseReg.getReg())) || in Is16BitMemOperand()
210 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand() local
213 if ((BaseReg.getReg() != 0 && in Is32BitMemOperand()
214 X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg.getReg())) || in Is32BitMemOperand()
218 if (BaseReg.getReg() == X86::EIP) { in Is32BitMemOperand()
231 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand() local
234 if ((BaseReg.getReg() != 0 && in Is64BitMemOperand()
235 X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg.getReg())) || in Is64BitMemOperand()
387 unsigned BaseReg = Base.getReg(); in emitMemModRMByte() local
391 if (BaseReg == X86::RIP || in emitMemModRMByte()
392 BaseReg == X86::EIP) { // [disp32+rIP] in X86-64 mode in emitMemModRMByte()
441 unsigned BaseRegNo = BaseReg ? GetX86RegNum(Base) : -1U; in emitMemModRMByte()
446 if (BaseReg) { in emitMemModRMByte()
516 (!is64BitMode(STI) || BaseReg != 0)) { in emitMemModRMByte()
518 if (BaseReg == 0) { // [disp32] in X86-32 mode in emitMemModRMByte()
569 if (BaseReg == 0) { in emitMemModRMByte()
602 if (BaseReg == 0) { in emitMemModRMByte()