Lines Matching refs:atomic
27 defm ATOMIC_LOAD_I32 : WebAssemblyLoad<I32, "i32.atomic.load", 0xfe10>;
28 defm ATOMIC_LOAD_I64 : WebAssemblyLoad<I64, "i64.atomic.load", 0xfe11>;
61 // Extending loads. Note that there are only zero-extending atomic loads, no
63 defm ATOMIC_LOAD8_U_I32 : WebAssemblyLoad<I32, "i32.atomic.load8_u", 0xfe12>;
64 defm ATOMIC_LOAD16_U_I32 : WebAssemblyLoad<I32, "i32.atomic.load16_u", 0xfe13>;
65 defm ATOMIC_LOAD8_U_I64 : WebAssemblyLoad<I64, "i64.atomic.load8_u", 0xfe14>;
66 defm ATOMIC_LOAD16_U_I64 : WebAssemblyLoad<I64, "i64.atomic.load16_u", 0xfe15>;
67 defm ATOMIC_LOAD32_U_I64 : WebAssemblyLoad<I64, "i64.atomic.load32_u", 0xfe16>;
74 // We directly match zext patterns and select the zext atomic loads.
77 // These can be selected to a single zero-extending atomic load instruction.
95 // We don't have single sext atomic load instructions. So for sext loads, we
117 // 32->64 sext load gets selected as i32.atomic.load, i64.extend_i32_s
140 // No 32->64 patterns, just use i32.atomic.load and i64.extend_s/i64
199 defm ATOMIC_STORE_I32 : WebAssemblyStore<I32, "i32.atomic.store", 0xfe17>;
200 defm ATOMIC_STORE_I64 : WebAssemblyStore<I64, "i64.atomic.store", 0xfe18>;
202 // We need an 'atomic' version of store patterns because store and atomic_store
260 defm ATOMIC_STORE8_I32 : WebAssemblyStore<I32, "i32.atomic.store8", 0xfe19>;
261 defm ATOMIC_STORE16_I32 : WebAssemblyStore<I32, "i32.atomic.store16", 0xfe1a>;
262 defm ATOMIC_STORE8_I64 : WebAssemblyStore<I64, "i64.atomic.store8", 0xfe1b>;
263 defm ATOMIC_STORE16_I64 : WebAssemblyStore<I64, "i64.atomic.store16", 0xfe1c>;
264 defm ATOMIC_STORE32_I64 : WebAssemblyStore<I64, "i64.atomic.store32", 0xfe1d>;
268 // We don't have single truncating atomic store instructions. For 32-bit
269 // instructions, we just need to match bare atomic stores. On the other hand,
344 defm ATOMIC_RMW_ADD_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.add", 0xfe1e>;
345 defm ATOMIC_RMW_ADD_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.add", 0xfe1f>;
347 WebAssemblyBinRMW<I32, "i32.atomic.rmw8.add_u", 0xfe20>;
349 WebAssemblyBinRMW<I32, "i32.atomic.rmw16.add_u", 0xfe21>;
351 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.add_u", 0xfe22>;
353 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.add_u", 0xfe23>;
355 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.add_u", 0xfe24>;
357 defm ATOMIC_RMW_SUB_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.sub", 0xfe25>;
358 defm ATOMIC_RMW_SUB_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.sub", 0xfe26>;
360 WebAssemblyBinRMW<I32, "i32.atomic.rmw8.sub_u", 0xfe27>;
362 WebAssemblyBinRMW<I32, "i32.atomic.rmw16.sub_u", 0xfe28>;
364 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.sub_u", 0xfe29>;
366 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.sub_u", 0xfe2a>;
368 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.sub_u", 0xfe2b>;
370 defm ATOMIC_RMW_AND_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.and", 0xfe2c>;
371 defm ATOMIC_RMW_AND_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.and", 0xfe2d>;
373 WebAssemblyBinRMW<I32, "i32.atomic.rmw8.and_u", 0xfe2e>;
375 WebAssemblyBinRMW<I32, "i32.atomic.rmw16.and_u", 0xfe2f>;
377 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.and_u", 0xfe30>;
379 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.and_u", 0xfe31>;
381 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.and_u", 0xfe32>;
383 defm ATOMIC_RMW_OR_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.or", 0xfe33>;
384 defm ATOMIC_RMW_OR_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.or", 0xfe34>;
386 WebAssemblyBinRMW<I32, "i32.atomic.rmw8.or_u", 0xfe35>;
388 WebAssemblyBinRMW<I32, "i32.atomic.rmw16.or_u", 0xfe36>;
390 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.or_u", 0xfe37>;
392 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.or_u", 0xfe38>;
394 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.or_u", 0xfe39>;
396 defm ATOMIC_RMW_XOR_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.xor", 0xfe3a>;
397 defm ATOMIC_RMW_XOR_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.xor", 0xfe3b>;
399 WebAssemblyBinRMW<I32, "i32.atomic.rmw8.xor_u", 0xfe3c>;
401 WebAssemblyBinRMW<I32, "i32.atomic.rmw16.xor_u", 0xfe3d>;
403 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.xor_u", 0xfe3e>;
405 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.xor_u", 0xfe3f>;
407 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.xor_u", 0xfe40>;
410 WebAssemblyBinRMW<I32, "i32.atomic.rmw.xchg", 0xfe41>;
412 WebAssemblyBinRMW<I64, "i64.atomic.rmw.xchg", 0xfe42>;
414 WebAssemblyBinRMW<I32, "i32.atomic.rmw8.xchg_u", 0xfe43>;
416 WebAssemblyBinRMW<I32, "i32.atomic.rmw16.xchg_u", 0xfe44>;
418 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.xchg_u", 0xfe45>;
420 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.xchg_u", 0xfe46>;
422 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.xchg_u", 0xfe47>;
533 // 32->64 sext RMW gets selected as i32.atomic.rmw.***, i64.extend_i32_s
676 WebAssemblyTerRMW<I32, "i32.atomic.rmw.cmpxchg", 0xfe48>;
678 WebAssemblyTerRMW<I64, "i64.atomic.rmw.cmpxchg", 0xfe49>;
680 WebAssemblyTerRMW<I32, "i32.atomic.rmw8.cmpxchg_u", 0xfe4a>;
682 WebAssemblyTerRMW<I32, "i32.atomic.rmw16.cmpxchg_u", 0xfe4b>;
684 WebAssemblyTerRMW<I64, "i64.atomic.rmw8.cmpxchg_u", 0xfe4c>;
686 WebAssemblyTerRMW<I64, "i64.atomic.rmw16.cmpxchg_u", 0xfe4d>;
688 WebAssemblyTerRMW<I64, "i64.atomic.rmw32.cmpxchg_u", 0xfe4e>;
793 // 32->64 sext RMW gets selected as i32.atomic.rmw.***, i64.extend_i32_s
906 "atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
907 "atomic.notify \t${off}, ${p2align}", 0xfe00>;
913 "i32.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
914 "i32.atomic.wait \t${off}, ${p2align}", 0xfe01>;
919 "i64.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
920 "i64.atomic.wait \t${off}, ${p2align}", 0xfe02>;