Lines Matching refs:opcode
1972 class InherentRRE<string mnemonic, bits<16> opcode, RegisterOperand cls,
1974 : InstRRE<opcode, (outs cls:$R1), (ins),
1980 class InherentDualRRE<string mnemonic, bits<16> opcode, RegisterOperand cls>
1981 : InstRRE<opcode, (outs cls:$R1, cls:$R2), (ins),
1984 class InherentVRIa<string mnemonic, bits<16> opcode, bits<16> value>
1985 : InstVRIa<opcode, (outs VR128:$V1), (ins), mnemonic#"\t$V1", []> {
1990 class StoreInherentS<string mnemonic, bits<16> opcode,
1992 : InstS<opcode, (outs), (ins bdaddr12only:$BD2),
1998 class SideEffectInherentE<string mnemonic, bits<16>opcode>
1999 : InstE<opcode, (outs), (ins), mnemonic, []>;
2001 class SideEffectInherentS<string mnemonic, bits<16> opcode,
2003 : InstS<opcode, (outs), (ins), mnemonic, [(operator)]> {
2007 class SideEffectInherentRRE<string mnemonic, bits<16> opcode>
2008 : InstRRE<opcode, (outs), (ins), mnemonic, []> {
2014 class CallRI<string mnemonic, bits<12> opcode>
2015 : InstRIb<opcode, (outs), (ins GR64:$R1, brtarget16tls:$RI2),
2019 class CallRIL<string mnemonic, bits<12> opcode>
2020 : InstRILb<opcode, (outs), (ins GR64:$R1, brtarget32tls:$RI2),
2023 class CallRR<string mnemonic, bits<8> opcode>
2024 : InstRR<opcode, (outs), (ins GR64:$R1, ADDR64:$R2),
2027 class CallRX<string mnemonic, bits<8> opcode>
2028 : InstRXa<opcode, (outs), (ins GR64:$R1, bdxaddr12only:$XBD2),
2031 class CondBranchRI<string mnemonic, bits<12> opcode,
2033 : InstRIc<opcode, (outs), (ins cond4:$valid, cond4:$M1, brtarget16:$RI2),
2039 class AsmCondBranchRI<string mnemonic, bits<12> opcode>
2040 : InstRIc<opcode, (outs), (ins imm32zx4:$M1, brtarget16:$RI2),
2043 class FixedCondBranchRI<CondVariant V, string mnemonic, bits<12> opcode,
2045 : InstRIc<opcode, (outs), (ins brtarget16:$RI2),
2051 class CondBranchRIL<string mnemonic, bits<12> opcode>
2052 : InstRILc<opcode, (outs), (ins cond4:$valid, cond4:$M1, brtarget32:$RI2),
2057 class AsmCondBranchRIL<string mnemonic, bits<12> opcode>
2058 : InstRILc<opcode, (outs), (ins imm32zx4:$M1, brtarget32:$RI2),
2061 class FixedCondBranchRIL<CondVariant V, string mnemonic, bits<12> opcode>
2062 : InstRILc<opcode, (outs), (ins brtarget32:$RI2),
2068 class CondBranchRR<string mnemonic, bits<8> opcode>
2069 : InstRR<opcode, (outs), (ins cond4:$valid, cond4:$R1, GR64:$R2),
2074 class AsmCondBranchRR<string mnemonic, bits<8> opcode>
2075 : InstRR<opcode, (outs), (ins imm32zx4:$R1, GR64:$R2),
2078 class FixedCondBranchRR<CondVariant V, string mnemonic, bits<8> opcode,
2080 : InstRR<opcode, (outs), (ins ADDR64:$R2),
2086 class CondBranchRX<string mnemonic, bits<8> opcode>
2087 : InstRXb<opcode, (outs), (ins cond4:$valid, cond4:$M1, bdxaddr12only:$XBD2),
2092 class AsmCondBranchRX<string mnemonic, bits<8> opcode>
2093 : InstRXb<opcode, (outs), (ins imm32zx4:$M1, bdxaddr12only:$XBD2),
2096 class FixedCondBranchRX<CondVariant V, string mnemonic, bits<8> opcode>
2097 : InstRXb<opcode, (outs), (ins bdxaddr12only:$XBD2),
2103 class CondBranchRXY<string mnemonic, bits<16> opcode>
2104 : InstRXYb<opcode, (outs), (ins cond4:$valid, cond4:$M1, bdxaddr20only:$XBD2),
2110 class AsmCondBranchRXY<string mnemonic, bits<16> opcode>
2111 : InstRXYb<opcode, (outs), (ins imm32zx4:$M1, bdxaddr20only:$XBD2),
2116 class FixedCondBranchRXY<CondVariant V, string mnemonic, bits<16> opcode,
2118 : InstRXYb<opcode, (outs), (ins bdxaddr20only:$XBD2),
2126 class CmpBranchRIEa<string mnemonic, bits<16> opcode,
2128 : InstRIEa<opcode, (outs), (ins cls:$R1, imm:$I2, cond4:$M3),
2131 class AsmCmpBranchRIEa<string mnemonic, bits<16> opcode,
2133 : InstRIEa<opcode, (outs), (ins cls:$R1, imm:$I2, imm32zx4:$M3),
2136 class FixedCmpBranchRIEa<CondVariant V, string mnemonic, bits<16> opcode,
2138 : InstRIEa<opcode, (outs), (ins cls:$R1, imm:$I2),
2144 multiclass CmpBranchRIEaPair<string mnemonic, bits<16> opcode,
2147 def "" : CmpBranchRIEa<mnemonic, opcode, cls, imm>;
2148 def Asm : AsmCmpBranchRIEa<mnemonic, opcode, cls, imm>;
2151 class CmpBranchRIEb<string mnemonic, bits<16> opcode,
2153 : InstRIEb<opcode, (outs),
2157 class AsmCmpBranchRIEb<string mnemonic, bits<16> opcode,
2159 : InstRIEb<opcode, (outs),
2163 class FixedCmpBranchRIEb<CondVariant V, string mnemonic, bits<16> opcode,
2165 : InstRIEb<opcode, (outs), (ins cls:$R1, cls:$R2, brtarget16:$RI4),
2171 multiclass CmpBranchRIEbPair<string mnemonic, bits<16> opcode,
2174 def "" : CmpBranchRIEb<mnemonic, opcode, cls>;
2175 def Asm : AsmCmpBranchRIEb<mnemonic, opcode, cls>;
2178 class CmpBranchRIEc<string mnemonic, bits<16> opcode,
2180 : InstRIEc<opcode, (outs),
2184 class AsmCmpBranchRIEc<string mnemonic, bits<16> opcode,
2186 : InstRIEc<opcode, (outs),
2190 class FixedCmpBranchRIEc<CondVariant V, string mnemonic, bits<16> opcode,
2192 : InstRIEc<opcode, (outs), (ins cls:$R1, imm:$I2, brtarget16:$RI4),
2198 multiclass CmpBranchRIEcPair<string mnemonic, bits<16> opcode,
2201 def "" : CmpBranchRIEc<mnemonic, opcode, cls, imm>;
2202 def Asm : AsmCmpBranchRIEc<mnemonic, opcode, cls, imm>;
2205 class CmpBranchRRFc<string mnemonic, bits<16> opcode,
2207 : InstRRFc<opcode, (outs), (ins cls:$R1, cls:$R2, cond4:$M3),
2210 class AsmCmpBranchRRFc<string mnemonic, bits<16> opcode,
2212 : InstRRFc<opcode, (outs), (ins cls:$R1, cls:$R2, imm32zx4:$M3),
2215 multiclass CmpBranchRRFcPair<string mnemonic, bits<16> opcode,
2218 def "" : CmpBranchRRFc<mnemonic, opcode, cls>;
2219 def Asm : AsmCmpBranchRRFc<mnemonic, opcode, cls>;
2222 class FixedCmpBranchRRFc<CondVariant V, string mnemonic, bits<16> opcode,
2224 : InstRRFc<opcode, (outs), (ins cls:$R1, cls:$R2),
2230 class CmpBranchRRS<string mnemonic, bits<16> opcode,
2232 : InstRRS<opcode, (outs),
2236 class AsmCmpBranchRRS<string mnemonic, bits<16> opcode,
2238 : InstRRS<opcode, (outs),
2242 class FixedCmpBranchRRS<CondVariant V, string mnemonic, bits<16> opcode,
2244 : InstRRS<opcode, (outs), (ins cls:$R1, cls:$R2, bdaddr12only:$BD4),
2250 multiclass CmpBranchRRSPair<string mnemonic, bits<16> opcode,
2253 def "" : CmpBranchRRS<mnemonic, opcode, cls>;
2254 def Asm : AsmCmpBranchRRS<mnemonic, opcode, cls>;
2257 class CmpBranchRIS<string mnemonic, bits<16> opcode,
2259 : InstRIS<opcode, (outs),
2263 class AsmCmpBranchRIS<string mnemonic, bits<16> opcode,
2265 : InstRIS<opcode, (outs),
2269 class FixedCmpBranchRIS<CondVariant V, string mnemonic, bits<16> opcode,
2271 : InstRIS<opcode, (outs), (ins cls:$R1, imm:$I2, bdaddr12only:$BD4),
2277 multiclass CmpBranchRISPair<string mnemonic, bits<16> opcode,
2280 def "" : CmpBranchRIS<mnemonic, opcode, cls, imm>;
2281 def Asm : AsmCmpBranchRIS<mnemonic, opcode, cls, imm>;
2284 class CmpBranchRSYb<string mnemonic, bits<16> opcode,
2286 : InstRSYb<opcode, (outs), (ins cls:$R1, bdaddr20only:$BD2, cond4:$M3),
2289 class AsmCmpBranchRSYb<string mnemonic, bits<16> opcode,
2291 : InstRSYb<opcode, (outs), (ins cls:$R1, bdaddr20only:$BD2, imm32zx4:$M3),
2294 multiclass CmpBranchRSYbPair<string mnemonic, bits<16> opcode,
2297 def "" : CmpBranchRSYb<mnemonic, opcode, cls>;
2298 def Asm : AsmCmpBranchRSYb<mnemonic, opcode, cls>;
2301 class FixedCmpBranchRSYb<CondVariant V, string mnemonic, bits<16> opcode,
2303 : InstRSYb<opcode, (outs), (ins cls:$R1, bdaddr20only:$BD2),
2309 class BranchUnaryRI<string mnemonic, bits<12> opcode, RegisterOperand cls>
2310 : InstRIb<opcode, (outs cls:$R1), (ins cls:$R1src, brtarget16:$RI2),
2316 class BranchUnaryRIL<string mnemonic, bits<12> opcode, RegisterOperand cls>
2317 : InstRILb<opcode, (outs cls:$R1), (ins cls:$R1src, brtarget32:$RI2),
2323 class BranchUnaryRR<string mnemonic, bits<8> opcode, RegisterOperand cls>
2324 : InstRR<opcode, (outs cls:$R1), (ins cls:$R1src, GR64:$R2),
2330 class BranchUnaryRRE<string mnemonic, bits<16> opcode, RegisterOperand cls>
2331 : InstRRE<opcode, (outs cls:$R1), (ins cls:$R1src, GR64:$R2),
2337 class BranchUnaryRX<string mnemonic, bits<8> opcode, RegisterOperand cls>
2338 : InstRXa<opcode, (outs cls:$R1), (ins cls:$R1src, bdxaddr12only:$XBD2),
2344 class BranchUnaryRXY<string mnemonic, bits<16> opcode, RegisterOperand cls>
2345 : InstRXYa<opcode, (outs cls:$R1), (ins cls:$R1src, bdxaddr20only:$XBD2),
2351 class BranchBinaryRSI<string mnemonic, bits<8> opcode, RegisterOperand cls>
2352 : InstRSI<opcode, (outs cls:$R1), (ins cls:$R1src, cls:$R3, brtarget16:$RI2),
2358 class BranchBinaryRIEe<string mnemonic, bits<16> opcode, RegisterOperand cls>
2359 : InstRIEe<opcode, (outs cls:$R1),
2366 class BranchBinaryRS<string mnemonic, bits<8> opcode, RegisterOperand cls>
2367 : InstRSa<opcode, (outs cls:$R1),
2374 class BranchBinaryRSY<string mnemonic, bits<16> opcode, RegisterOperand cls>
2375 : InstRSYa<opcode,
2382 class LoadMultipleRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
2384 : InstRSa<opcode, (outs cls:$R1, cls:$R3), (ins mode:$BD2),
2389 class LoadMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
2391 : InstRSYa<opcode, (outs cls:$R1, cls:$R3), (ins mode:$BD2),
2406 class LoadMultipleSSe<string mnemonic, bits<8> opcode, RegisterOperand cls>
2407 : InstSSe<opcode, (outs cls:$R1, cls:$R3),
2413 class LoadMultipleVRSa<string mnemonic, bits<16> opcode>
2414 : InstVRSa<opcode, (outs VR128:$V1, VR128:$V3), (ins bdaddr12only:$BD2),
2420 class StoreRILPC<string mnemonic, bits<12> opcode, SDPatternOperator operator,
2422 : InstRILb<opcode, (outs), (ins cls:$R1, pcrel32:$RI2),
2432 class StoreRX<string mnemonic, bits<8> opcode, SDPatternOperator operator,
2435 : InstRXa<opcode, (outs), (ins cls:$R1, mode:$XBD2),
2444 class StoreRXY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2447 : InstRXYa<opcode, (outs), (ins cls:$R1, mode:$XBD2),
2468 class StoreVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2470 : InstVRX<opcode, (outs), (ins tr.op:$V1, bdxaddr12only:$XBD2),
2478 class StoreLengthVRSb<string mnemonic, bits<16> opcode,
2480 : InstVRSb<opcode, (outs), (ins VR128:$V1, GR32:$R3, bdaddr12only:$BD2),
2488 class StoreLengthVRSd<string mnemonic, bits<16> opcode,
2490 : InstVRSd<opcode, (outs), (ins VR128:$V1, GR32:$R3, bdaddr12only:$BD2),
2497 class StoreLengthVSI<string mnemonic, bits<16> opcode,
2499 : InstVSI<opcode, (outs), (ins VR128:$V1, bdaddr12only:$BD2, imm32zx8:$I3),
2506 class StoreMultipleRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
2508 : InstRSa<opcode, (outs), (ins cls:$R1, cls:$R3, mode:$BD2),
2513 class StoreMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
2515 : InstRSYa<opcode, (outs), (ins cls:$R1, cls:$R3, mode:$BD2),
2530 class StoreMultipleVRSa<string mnemonic, bits<16> opcode>
2531 : InstVRSa<opcode, (outs), (ins VR128:$V1, VR128:$V3, bdaddr12only:$BD2),
2543 class StoreSI<string mnemonic, bits<8> opcode, SDPatternOperator operator,
2545 : InstSI<opcode, (outs), (ins mviaddr12pair:$BD1, imm:$I2),
2551 class StoreSIY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2553 : InstSIY<opcode, (outs), (ins mviaddr20pair:$BD1, imm:$I2),
2559 class StoreSIL<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2561 : InstSIL<opcode, (outs), (ins mviaddr12pair:$BD1, imm:$I2),
2577 class StoreSSE<string mnemonic, bits<16> opcode>
2578 : InstSSE<opcode, (outs), (ins bdaddr12only:$BD1, bdaddr12only:$BD2),
2583 class CondStoreRSY<string mnemonic, bits<16> opcode,
2586 : InstRSYb<opcode, (outs), (ins cls:$R1, mode:$BD2, cond4:$valid, cond4:$M3),
2595 class AsmCondStoreRSY<string mnemonic, bits<16> opcode,
2598 : InstRSYb<opcode, (outs), (ins cls:$R1, mode:$BD2, imm32zx4:$M3),
2605 class FixedCondStoreRSY<CondVariant V, string mnemonic, bits<16> opcode,
2608 : InstRSYb<opcode, (outs), (ins cls:$R1, mode:$BD2),
2616 multiclass CondStoreRSYPair<string mnemonic, bits<16> opcode,
2620 def "" : CondStoreRSY<mnemonic, opcode, cls, bytes, mode>;
2621 def Asm : AsmCondStoreRSY<mnemonic, opcode, cls, bytes, mode>;
2624 class SideEffectUnaryI<string mnemonic, bits<8> opcode, Immediate imm>
2625 : InstI<opcode, (outs), (ins imm:$I1),
2628 class SideEffectUnaryRR<string mnemonic, bits<8>opcode, RegisterOperand cls>
2629 : InstRR<opcode, (outs), (ins cls:$R1),
2634 class SideEffectUnaryRRE<string mnemonic, bits<16> opcode, RegisterOperand cls,
2636 : InstRRE<opcode, (outs), (ins cls:$R1),
2641 class SideEffectUnaryS<string mnemonic, bits<16> opcode,
2644 : InstS<opcode, (outs), (ins mode:$BD2),
2650 class SideEffectAddressS<string mnemonic, bits<16> opcode,
2653 : InstS<opcode, (outs), (ins mode:$BD2),
2656 class LoadAddressRX<string mnemonic, bits<8> opcode,
2658 : InstRXa<opcode, (outs GR64:$R1), (ins mode:$XBD2),
2662 class LoadAddressRXY<string mnemonic, bits<16> opcode,
2664 : InstRXYa<opcode, (outs GR64:$R1), (ins mode:$XBD2),
2678 class LoadAddressRIL<string mnemonic, bits<12> opcode,
2680 : InstRILb<opcode, (outs GR64:$R1), (ins pcrel32:$RI2),
2684 class UnaryRR<string mnemonic, bits<8> opcode, SDPatternOperator operator,
2686 : InstRR<opcode, (outs cls1:$R1), (ins cls2:$R2),
2693 class UnaryRRE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2695 : InstRRE<opcode, (outs cls1:$R1), (ins cls2:$R2),
2702 class UnaryTiedRRE<string mnemonic, bits<16> opcode, RegisterOperand cls>
2703 : InstRRE<opcode, (outs cls:$R1), (ins cls:$R1src),
2710 class UnaryMemRRFc<string mnemonic, bits<16> opcode,
2712 : InstRRFc<opcode, (outs cls2:$R2, cls1:$R1), (ins cls1:$R1src),
2719 class UnaryRI<string mnemonic, bits<12> opcode, SDPatternOperator operator,
2721 : InstRIa<opcode, (outs cls:$R1), (ins imm:$I2),
2725 class UnaryRIL<string mnemonic, bits<12> opcode, SDPatternOperator operator,
2727 : InstRILa<opcode, (outs cls:$R1), (ins imm:$I2),
2731 class UnaryRILPC<string mnemonic, bits<12> opcode, SDPatternOperator operator,
2733 : InstRILb<opcode, (outs cls:$R1), (ins pcrel32:$RI2),
2743 class CondUnaryRSY<string mnemonic, bits<16> opcode,
2746 : InstRSYb<opcode, (outs cls:$R1),
2761 class AsmCondUnaryRSY<string mnemonic, bits<16> opcode,
2764 : InstRSYb<opcode, (outs cls:$R1), (ins cls:$R1src, mode:$BD2, imm32zx4:$M3),
2773 class FixedCondUnaryRSY<CondVariant V, string mnemonic, bits<16> opcode,
2776 : InstRSYb<opcode, (outs cls:$R1), (ins cls:$R1src, mode:$BD2),
2786 multiclass CondUnaryRSYPair<string mnemonic, bits<16> opcode,
2791 def "" : CondUnaryRSY<mnemonic, opcode, operator, cls, bytes, mode>;
2792 def Asm : AsmCondUnaryRSY<mnemonic, opcode, cls, bytes, mode>;
2795 class UnaryRX<string mnemonic, bits<8> opcode, SDPatternOperator operator,
2798 : InstRXa<opcode, (outs cls:$R1), (ins mode:$XBD2),
2807 class UnaryRXE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2809 : InstRXE<opcode, (outs cls:$R1), (ins bdxaddr12only:$XBD2),
2819 class UnaryRXY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2822 : InstRXYa<opcode, (outs cls:$R1), (ins mode:$XBD2),
2843 class UnaryVRIa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2845 : InstVRIa<opcode, (outs tr.op:$V1), (ins imm:$I2),
2851 class UnaryVRIaGeneric<string mnemonic, bits<16> opcode, Immediate imm>
2852 : InstVRIa<opcode, (outs VR128:$V1), (ins imm:$I2, imm32zx4:$M3),
2855 class UnaryVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2858 : InstVRRa<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2),
2866 class UnaryVRRaGeneric<string mnemonic, bits<16> opcode, bits<4> m4 = 0,
2868 : InstVRRa<opcode, (outs VR128:$V1), (ins VR128:$V2, imm32zx4:$M3),
2874 class UnaryVRRaFloatGeneric<string mnemonic, bits<16> opcode, bits<4> m5 = 0>
2875 : InstVRRa<opcode, (outs VR128:$V1),
2885 multiclass UnaryExtraVRRaSPair<string mnemonic, bits<16> opcode,
2890 def "" : InstVRRa<opcode, (outs tr1.op:$V1),
2898 def S : UnaryVRRa<mnemonic##"s", opcode, operator_cc, tr1, tr2,
2902 multiclass UnaryExtraVRRaSPairGeneric<string mnemonic, bits<16> opcode> {
2904 def "" : InstVRRa<opcode, (outs VR128:$V1),
2912 class UnaryVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2914 : InstVRX<opcode, (outs tr.op:$V1), (ins bdxaddr12only:$XBD2),
2922 class UnaryVRXGeneric<string mnemonic, bits<16> opcode>
2923 : InstVRX<opcode, (outs VR128:$V1), (ins bdxaddr12only:$XBD2, imm32zx4:$M3),
2928 class SideEffectBinaryRX<string mnemonic, bits<8> opcode,
2930 : InstRXa<opcode, (outs), (ins cls:$R1, bdxaddr12only:$XBD2),
2933 class SideEffectBinaryRXY<string mnemonic, bits<16> opcode,
2935 : InstRXYa<opcode, (outs), (ins cls:$R1, bdxaddr20only:$XBD2),
2938 class SideEffectBinaryRILPC<string mnemonic, bits<12> opcode,
2940 : InstRILb<opcode, (outs), (ins cls:$R1, pcrel32:$RI2),
2948 class SideEffectBinaryRRE<string mnemonic, bits<16> opcode,
2950 : InstRRE<opcode, (outs), (ins cls1:$R1, cls2:$R2),
2953 class SideEffectBinaryRRFa<string mnemonic, bits<16> opcode,
2955 : InstRRFa<opcode, (outs), (ins cls1:$R1, cls2:$R2),
2961 class SideEffectBinaryRRFc<string mnemonic, bits<16> opcode,
2963 : InstRRFc<opcode, (outs), (ins cls1:$R1, cls2:$R2),
2968 class SideEffectBinaryIE<string mnemonic, bits<16> opcode,
2970 : InstIE<opcode, (outs), (ins imm1:$I1, imm2:$I2),
2973 class SideEffectBinarySI<string mnemonic, bits<8> opcode, Operand imm>
2974 : InstSI<opcode, (outs), (ins bdaddr12only:$BD1, imm:$I2),
2977 class SideEffectBinarySIL<string mnemonic, bits<16> opcode,
2979 : InstSIL<opcode, (outs), (ins bdaddr12only:$BD1, imm:$I2),
2982 class SideEffectBinarySSa<string mnemonic, bits<8> opcode>
2983 : InstSSa<opcode, (outs), (ins bdladdr12onlylen8:$BDL1, bdaddr12only:$BD2),
2986 class SideEffectBinarySSb<string mnemonic, bits<8> opcode>
2987 : InstSSb<opcode,
2991 class SideEffectBinarySSf<string mnemonic, bits<8> opcode>
2992 : InstSSf<opcode, (outs), (ins bdaddr12only:$BD1, bdladdr12onlylen8:$BDL2),
2995 class SideEffectBinarySSE<string mnemonic, bits<16> opcode>
2996 : InstSSE<opcode, (outs), (ins bdaddr12only:$BD1, bdaddr12only:$BD2),
2999 class SideEffectBinaryMemMemRR<string mnemonic, bits<8> opcode,
3001 : InstRR<opcode, (outs cls1:$R1, cls2:$R2), (ins cls1:$R1src, cls2:$R2src),
3007 class SideEffectBinaryMemRRE<string mnemonic, bits<16> opcode,
3009 : InstRRE<opcode, (outs cls2:$R2), (ins cls1:$R1, cls2:$R2src),
3015 class SideEffectBinaryMemMemRRE<string mnemonic, bits<16> opcode,
3017 : InstRRE<opcode, (outs cls1:$R1, cls2:$R2), (ins cls1:$R1src, cls2:$R2src),
3023 class SideEffectBinaryMemMemRRFc<string mnemonic, bits<16> opcode,
3025 : InstRRFc<opcode, (outs cls1:$R1, cls2:$R2), (ins cls1:$R1src, cls2:$R2src),
3032 class BinaryRR<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3034 : InstRR<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2),
3043 class BinaryRRE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3045 : InstRRE<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2),
3054 class BinaryRRD<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3056 : InstRRD<opcode, (outs cls1:$R1), (ins cls2:$R3, cls2:$R2),
3063 class BinaryRRFa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3066 : InstRRFa<opcode, (outs cls1:$R1), (ins cls2:$R2, cls3:$R3),
3096 class BinaryRRFb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3099 : InstRRFb<opcode, (outs cls1:$R1), (ins cls2:$R2, cls3:$R3),
3105 class BinaryMemRRFc<string mnemonic, bits<16> opcode,
3107 : InstRRFc<opcode, (outs cls2:$R2, cls1:$R1), (ins cls1:$R1src, imm:$M3),
3113 multiclass BinaryMemRRFcOpt<string mnemonic, bits<16> opcode,
3115 def "" : BinaryMemRRFc<mnemonic, opcode, cls1, cls2, imm32zx4>;
3116 def Opt : UnaryMemRRFc<mnemonic, opcode, cls1, cls2>;
3119 class BinaryRRFd<string mnemonic, bits<16> opcode, RegisterOperand cls1,
3121 : InstRRFd<opcode, (outs cls1:$R1), (ins cls2:$R2, imm32zx4:$M4),
3124 class BinaryRRFe<string mnemonic, bits<16> opcode, RegisterOperand cls1,
3126 : InstRRFe<opcode, (outs cls1:$R1), (ins imm32zx4:$M3, cls2:$R2),
3131 class CondBinaryRRF<string mnemonic, bits<16> opcode, RegisterOperand cls1,
3133 : InstRRFc<opcode, (outs cls1:$R1),
3145 class AsmCondBinaryRRF<string mnemonic, bits<16> opcode, RegisterOperand cls1,
3147 : InstRRFc<opcode, (outs cls1:$R1),
3155 class FixedCondBinaryRRF<CondVariant V, string mnemonic, bits<16> opcode,
3157 : InstRRFc<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2),
3165 multiclass CondBinaryRRFPair<string mnemonic, bits<16> opcode,
3168 def "" : CondBinaryRRF<mnemonic, opcode, cls1, cls2>;
3169 def Asm : AsmCondBinaryRRF<mnemonic, opcode, cls1, cls2>;
3172 class BinaryRI<string mnemonic, bits<12> opcode, SDPatternOperator operator,
3174 : InstRIa<opcode, (outs cls:$R1), (ins cls:$R1src, imm:$I2),
3181 class BinaryRIE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3183 : InstRIEd<opcode, (outs cls:$R1), (ins cls:$R3, imm:$I2),
3199 class CondBinaryRIE<string mnemonic, bits<16> opcode, RegisterOperand cls,
3201 : InstRIEg<opcode, (outs cls:$R1),
3213 class AsmCondBinaryRIE<string mnemonic, bits<16> opcode, RegisterOperand cls,
3215 : InstRIEg<opcode, (outs cls:$R1),
3223 class FixedCondBinaryRIE<CondVariant V, string mnemonic, bits<16> opcode,
3225 : InstRIEg<opcode, (outs cls:$R1), (ins cls:$R1src, imm:$I2),
3233 multiclass CondBinaryRIEPair<string mnemonic, bits<16> opcode,
3236 def "" : CondBinaryRIE<mnemonic, opcode, cls, imm>;
3237 def Asm : AsmCondBinaryRIE<mnemonic, opcode, cls, imm>;
3240 class BinaryRIL<string mnemonic, bits<12> opcode, SDPatternOperator operator,
3242 : InstRILa<opcode, (outs cls:$R1), (ins cls:$R1src, imm:$I2),
3249 class BinaryRS<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3251 : InstRSa<opcode, (outs cls:$R1), (ins cls:$R1src, shift12only:$BD2),
3259 class BinaryRSY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3261 : InstRSYa<opcode, (outs cls:$R1), (ins cls:$R3, shift20only:$BD2),
3276 class BinaryRSL<string mnemonic, bits<16> opcode, RegisterOperand cls>
3277 : InstRSLb<opcode, (outs cls:$R1),
3283 class BinaryRX<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3286 : InstRXa<opcode, (outs cls:$R1), (ins cls:$R1src, mode:$XBD2),
3297 class BinaryRXE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3299 : InstRXE<opcode, (outs cls:$R1), (ins cls:$R1src, bdxaddr12only:$XBD2),
3312 class BinaryRXF<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3315 : InstRXF<opcode, (outs cls1:$R1), (ins cls2:$R3, bdxaddr12only:$XBD2),
3324 class BinaryRXY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3327 : InstRXYa<opcode, (outs cls:$R1), (ins cls:$R1src, mode:$XBD2),
3351 class BinarySI<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3353 : InstSI<opcode, (outs), (ins mode:$BD1, imm:$I2),
3360 class BinarySIY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3362 : InstSIY<opcode, (outs), (ins mode:$BD1, imm:$I2),
3380 class BinarySSF<string mnemonic, bits<12> opcode, RegisterOperand cls>
3381 : InstSSF<opcode, (outs cls:$R3), (ins bdaddr12pair:$BD1, bdaddr12pair:$BD2),
3386 class BinaryVRIb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3388 : InstVRIb<opcode, (outs tr.op:$V1), (ins imm32zx8:$I2, imm32zx8:$I3),
3394 class BinaryVRIbGeneric<string mnemonic, bits<16> opcode>
3395 : InstVRIb<opcode, (outs VR128:$V1),
3399 class BinaryVRIc<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3401 : InstVRIc<opcode, (outs tr1.op:$V1), (ins tr2.op:$V3, imm32zx16:$I2),
3408 class BinaryVRIcGeneric<string mnemonic, bits<16> opcode>
3409 : InstVRIc<opcode, (outs VR128:$V1),
3413 class BinaryVRIe<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3415 : InstVRIe<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, imm32zx12:$I3),
3423 class BinaryVRIeFloatGeneric<string mnemonic, bits<16> opcode>
3424 : InstVRIe<opcode, (outs VR128:$V1),
3428 class BinaryVRIh<string mnemonic, bits<16> opcode>
3429 : InstVRIh<opcode, (outs VR128:$V1),
3433 class BinaryVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3435 : InstVRRa<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, imm32zx4:$M5),
3443 class BinaryVRRaFloatGeneric<string mnemonic, bits<16> opcode>
3444 : InstVRRa<opcode, (outs VR128:$V1),
3448 class BinaryVRRb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3451 : InstVRRb<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, tr2.op:$V3),
3461 multiclass BinaryVRRbSPair<string mnemonic, bits<16> opcode,
3465 def "" : BinaryVRRb<mnemonic, opcode, operator, tr1, tr2, type,
3468 def S : BinaryVRRb<mnemonic##"s", opcode, operator_cc, tr1, tr2, type,
3472 class BinaryVRRbSPairGeneric<string mnemonic, bits<16> opcode>
3473 : InstVRRb<opcode, (outs VR128:$V1),
3483 multiclass BinaryExtraVRRbSPair<string mnemonic, bits<16> opcode,
3488 def "" : InstVRRb<opcode, (outs tr1.op:$V1),
3497 def S : BinaryVRRb<mnemonic##"s", opcode, operator_cc, tr1, tr2, type, 1>;
3500 multiclass BinaryExtraVRRbSPairGeneric<string mnemonic, bits<16> opcode> {
3502 def "" : InstVRRb<opcode, (outs VR128:$V1),
3510 class BinaryVRRc<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3513 : InstVRRc<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, tr2.op:$V3),
3522 class BinaryVRRcGeneric<string mnemonic, bits<16> opcode, bits<4> m5 = 0,
3524 : InstVRRc<opcode, (outs VR128:$V1),
3531 class BinaryVRRcFloatGeneric<string mnemonic, bits<16> opcode, bits<4> m6 = 0>
3532 : InstVRRc<opcode, (outs VR128:$V1),
3540 multiclass BinaryVRRcSPair<string mnemonic, bits<16> opcode,
3545 def "" : BinaryVRRc<mnemonic, opcode, operator, tr1, tr2, type,
3548 def S : BinaryVRRc<mnemonic##"s", opcode, operator_cc, tr1, tr2, type,
3552 class BinaryVRRcSPairFloatGeneric<string mnemonic, bits<16> opcode>
3553 : InstVRRc<opcode, (outs VR128:$V1),
3558 class BinaryVRRf<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3560 : InstVRRf<opcode, (outs tr.op:$V1), (ins GR64:$R2, GR64:$R3),
3564 class BinaryVRRi<string mnemonic, bits<16> opcode, RegisterOperand cls>
3565 : InstVRRi<opcode, (outs cls:$R1), (ins VR128:$V2, imm32zx4:$M3),
3568 class BinaryVRSa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3570 : InstVRSa<opcode, (outs tr1.op:$V1), (ins tr2.op:$V3, shift12only:$BD2),
3577 class BinaryVRSaGeneric<string mnemonic, bits<16> opcode>
3578 : InstVRSa<opcode, (outs VR128:$V1),
3582 class BinaryVRSb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3584 : InstVRSb<opcode, (outs VR128:$V1), (ins GR32:$R3, bdaddr12only:$BD2),
3592 class BinaryVRSc<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3594 : InstVRSc<opcode, (outs GR64:$R1), (ins tr.op:$V3, shift12only:$BD2),
3600 class BinaryVRScGeneric<string mnemonic, bits<16> opcode>
3601 : InstVRSc<opcode, (outs GR64:$R1),
3605 class BinaryVRSd<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3607 : InstVRSd<opcode, (outs VR128:$V1), (ins GR32:$R3, bdaddr12only:$BD2),
3614 class BinaryVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3616 : InstVRX<opcode, (outs VR128:$V1), (ins bdxaddr12only:$XBD2, imm32zx4:$M3),
3624 class StoreBinaryRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
3626 : InstRSb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, mode:$BD2),
3632 class StoreBinaryRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
3634 : InstRSYb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, mode:$BD2),
3652 class StoreBinaryRSL<string mnemonic, bits<16> opcode, RegisterOperand cls>
3653 : InstRSLb<opcode, (outs),
3659 class BinaryVSI<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3661 : InstVSI<opcode, (outs VR128:$V1), (ins bdaddr12only:$BD2, imm32zx8:$I3),
3668 class StoreBinaryVRV<string mnemonic, bits<16> opcode, bits<5> bytes,
3670 : InstVRV<opcode, (outs), (ins VR128:$V1, bdvaddr12only:$VBD2, index:$M3),
3676 class StoreBinaryVRX<string mnemonic, bits<16> opcode,
3679 : InstVRX<opcode, (outs), (ins tr.op:$V1, bdxaddr12only:$XBD2, index:$M3),
3686 class MemoryBinarySSd<string mnemonic, bits<8> opcode,
3688 : InstSSd<opcode, (outs),
3692 class CompareRR<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3694 : InstRR<opcode, (outs), (ins cls1:$R1, cls2:$R2),
3702 class CompareRRE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3704 : InstRRE<opcode, (outs), (ins cls1:$R1, cls2:$R2),
3712 class CompareRI<string mnemonic, bits<12> opcode, SDPatternOperator operator,
3714 : InstRIa<opcode, (outs), (ins cls:$R1, imm:$I2),
3720 class CompareRIL<string mnemonic, bits<12> opcode, SDPatternOperator operator,
3722 : InstRILa<opcode, (outs), (ins cls:$R1, imm:$I2),
3728 class CompareRILPC<string mnemonic, bits<12> opcode, SDPatternOperator operator,
3730 : InstRILb<opcode, (outs), (ins cls:$R1, pcrel32:$RI2),
3741 class CompareRX<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3744 : InstRXa<opcode, (outs), (ins cls:$R1, mode:$XBD2),
3754 class CompareRXE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3756 : InstRXE<opcode, (outs), (ins cls:$R1, bdxaddr12only:$XBD2),
3767 class CompareRXY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3770 : InstRXYa<opcode, (outs), (ins cls:$R1, mode:$XBD2),
3793 class CompareRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
3795 : InstRSb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, mode:$BD2),
3801 class CompareRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
3803 : InstRSYb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, mode:$BD2),
3819 class CompareSSb<string mnemonic, bits<8> opcode>
3820 : InstSSb<opcode,
3827 class CompareSI<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3830 : InstSI<opcode, (outs), (ins mode:$BD1, imm:$I2),
3837 class CompareSIL<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3839 : InstSIL<opcode, (outs), (ins bdaddr12only:$BD1, imm:$I2),
3846 class CompareSIY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3849 : InstSIY<opcode, (outs), (ins mode:$BD1, imm:$I2),
3868 class CompareVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3870 : InstVRRa<opcode, (outs), (ins tr.op:$V1, tr.op:$V2),
3879 class CompareVRRaGeneric<string mnemonic, bits<16> opcode>
3880 : InstVRRa<opcode, (outs), (ins VR128:$V1, VR128:$V2, imm32zx4:$M3),
3887 class CompareVRRaFloatGeneric<string mnemonic, bits<16> opcode>
3888 : InstVRRa<opcode, (outs),
3895 class CompareVRRh<string mnemonic, bits<16> opcode>
3896 : InstVRRh<opcode, (outs), (ins VR128:$V1, VR128:$V2, imm32zx4:$M3),
3901 class TestInherentS<string mnemonic, bits<16> opcode,
3903 : InstS<opcode, (outs), (ins), mnemonic, [(set CC, (operator))]> {
3907 class TestRXE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3909 : InstRXE<opcode, (outs), (ins cls:$R1, bdxaddr12only:$XBD2),
3915 class TestBinarySIL<string mnemonic, bits<16> opcode,
3917 : InstSIL<opcode, (outs), (ins bdaddr12only:$BD1, imm:$I2),
3921 class TestRSL<string mnemonic, bits<16> opcode>
3922 : InstRSLa<opcode, (outs), (ins bdladdr12onlylen4:$BDL1),
3927 class TestVRRg<string mnemonic, bits<16> opcode>
3928 : InstVRRg<opcode, (outs), (ins VR128:$V1),
3931 class SideEffectTernarySSc<string mnemonic, bits<8> opcode>
3932 : InstSSc<opcode, (outs), (ins bdladdr12onlylen4:$BDL1,
3936 class SideEffectTernaryRRFa<string mnemonic, bits<16> opcode,
3939 : InstRRFa<opcode, (outs), (ins cls1:$R1, cls2:$R2, cls3:$R3),
3944 class SideEffectTernaryRRFb<string mnemonic, bits<16> opcode,
3947 : InstRRFb<opcode, (outs), (ins cls1:$R1, cls2:$R2, cls3:$R3),
3952 class SideEffectTernaryMemMemMemRRFb<string mnemonic, bits<16> opcode,
3956 : InstRRFb<opcode, (outs cls1:$R1, cls2:$R2, cls3:$R3),
3964 class SideEffectTernaryRRFc<string mnemonic, bits<16> opcode,
3967 : InstRRFc<opcode, (outs), (ins cls1:$R1, cls2:$R2, imm:$M3),
3970 multiclass SideEffectTernaryRRFcOpt<string mnemonic, bits<16> opcode,
3973 def "" : SideEffectTernaryRRFc<mnemonic, opcode, cls1, cls2, imm32zx4>;
3974 def Opt : SideEffectBinaryRRFc<mnemonic, opcode, cls1, cls2>;
3977 class SideEffectTernaryMemMemRRFc<string mnemonic, bits<16> opcode,
3980 : InstRRFc<opcode, (outs cls1:$R1, cls2:$R2),
3987 multiclass SideEffectTernaryMemMemRRFcOpt<string mnemonic, bits<16> opcode,
3990 def "" : SideEffectTernaryMemMemRRFc<mnemonic, opcode, cls1, cls2, imm32zx4>;
3991 def Opt : SideEffectBinaryMemMemRRFc<mnemonic, opcode, cls1, cls2>;
3994 class SideEffectTernarySSF<string mnemonic, bits<12> opcode,
3996 : InstSSF<opcode, (outs),
4000 class TernaryRRFa<string mnemonic, bits<16> opcode,
4003 : InstRRFa<opcode, (outs cls1:$R1), (ins cls2:$R2, cls3:$R3, imm32zx4:$M4),
4006 class TernaryRRFb<string mnemonic, bits<16> opcode,
4009 : InstRRFb<opcode, (outs cls1:$R1, cls3:$R3),
4016 class TernaryRRFe<string mnemonic, bits<16> opcode, RegisterOperand cls1,
4018 : InstRRFe<opcode, (outs cls1:$R1),
4022 class TernaryRRD<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4024 : InstRRD<opcode, (outs cls1:$R1), (ins cls2:$R1src, cls2:$R3, cls2:$R2),
4033 class TernaryRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
4035 : InstRSb<opcode, (outs cls:$R1),
4045 class TernaryRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
4047 : InstRSYb<opcode, (outs cls:$R1),
4067 class SideEffectTernaryRS<string mnemonic, bits<8> opcode,
4069 : InstRSa<opcode, (outs),
4073 class SideEffectTernaryRSY<string mnemonic, bits<16> opcode,
4075 : InstRSYa<opcode, (outs),
4079 class SideEffectTernaryMemMemRS<string mnemonic, bits<8> opcode,
4081 : InstRSa<opcode, (outs cls1:$R1, cls2:$R3),
4088 class SideEffectTernaryMemMemRSY<string mnemonic, bits<16> opcode,
4090 : InstRSYa<opcode, (outs cls1:$R1, cls2:$R3),
4097 class TernaryRXF<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4100 : InstRXF<opcode, (outs cls1:$R1),
4113 class TernaryVRIa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4115 : InstVRIa<opcode, (outs tr1.op:$V1), (ins tr2.op:$V1src, imm:$I2, index:$M3),
4123 class TernaryVRId<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4125 : InstVRId<opcode, (outs tr1.op:$V1),
4134 class TernaryVRIi<string mnemonic, bits<16> opcode, RegisterOperand cls>
4135 : InstVRIi<opcode, (outs VR128:$V1),
4139 class TernaryVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4141 : InstVRRa<opcode, (outs tr1.op:$V1),
4151 class TernaryVRRaFloatGeneric<string mnemonic, bits<16> opcode>
4152 : InstVRRa<opcode, (outs VR128:$V1),
4156 class TernaryVRRb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4159 : InstVRRb<opcode, (outs tr1.op:$V1),
4172 multiclass TernaryOptVRRbSPair<string mnemonic, bits<16> opcode,
4177 def "" : TernaryVRRb<mnemonic, opcode, operator, tr1, tr2, type,
4183 def S : TernaryVRRb<mnemonic##"s", opcode, operator_cc, tr1, tr2, type,
4190 multiclass TernaryOptVRRbSPairGeneric<string mnemonic, bits<16> opcode> {
4192 def "" : InstVRRb<opcode, (outs VR128:$V1),
4200 class TernaryVRRc<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4202 : InstVRRc<opcode, (outs tr1.op:$V1),
4212 class TernaryVRRcFloat<string mnemonic, bits<16> opcode,
4215 : InstVRRc<opcode, (outs tr1.op:$V1),
4225 class TernaryVRRcFloatGeneric<string mnemonic, bits<16> opcode>
4226 : InstVRRc<opcode, (outs VR128:$V1),
4231 class TernaryVRRd<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4233 : InstVRRd<opcode, (outs tr1.op:$V1),
4243 class TernaryVRRdGeneric<string mnemonic, bits<16> opcode>
4244 : InstVRRd<opcode, (outs VR128:$V1),
4250 class TernaryVRRe<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4252 : InstVRRe<opcode, (outs tr1.op:$V1),
4262 class TernaryVRReFloatGeneric<string mnemonic, bits<16> opcode>
4263 : InstVRRe<opcode, (outs VR128:$V1),
4267 class TernaryVRSb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4269 : InstVRSb<opcode, (outs tr1.op:$V1),
4280 class TernaryVRSbGeneric<string mnemonic, bits<16> opcode>
4281 : InstVRSb<opcode, (outs VR128:$V1),
4288 class TernaryVRV<string mnemonic, bits<16> opcode, bits<5> bytes,
4290 : InstVRV<opcode, (outs VR128:$V1),
4299 class TernaryVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4301 : InstVRX<opcode, (outs tr1.op:$V1),
4313 class QuaternaryVRId<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4315 : InstVRId<opcode, (outs tr1.op:$V1),
4327 class QuaternaryVRIdGeneric<string mnemonic, bits<16> opcode>
4328 : InstVRId<opcode, (outs VR128:$V1),
4336 class QuaternaryVRIf<string mnemonic, bits<16> opcode>
4337 : InstVRIf<opcode, (outs VR128:$V1),
4342 class QuaternaryVRIg<string mnemonic, bits<16> opcode>
4343 : InstVRIg<opcode, (outs VR128:$V1),
4348 class QuaternaryVRRd<string mnemonic, bits<16> opcode,
4352 : InstVRRd<opcode, (outs tr1.op:$V1),
4363 class QuaternaryVRRdGeneric<string mnemonic, bits<16> opcode>
4364 : InstVRRd<opcode, (outs VR128:$V1),
4371 multiclass QuaternaryOptVRRdSPair<string mnemonic, bits<16> opcode,
4376 def "" : QuaternaryVRRd<mnemonic, opcode, operator,
4383 def S : QuaternaryVRRd<mnemonic##"s", opcode, operator_cc,
4391 multiclass QuaternaryOptVRRdSPairGeneric<string mnemonic, bits<16> opcode> {
4393 def "" : QuaternaryVRRdGeneric<mnemonic, opcode>;
4399 class SideEffectQuaternaryRRFa<string mnemonic, bits<16> opcode,
4402 : InstRRFa<opcode, (outs), (ins cls1:$R1, cls2:$R2, cls3:$R3, imm32zx4:$M4),
4405 multiclass SideEffectQuaternaryRRFaOptOpt<string mnemonic, bits<16> opcode,
4409 def "" : SideEffectQuaternaryRRFa<mnemonic, opcode, cls1, cls2, cls3>;
4410 def Opt : SideEffectTernaryRRFa<mnemonic, opcode, cls1, cls2, cls3>;
4411 def OptOpt : SideEffectBinaryRRFa<mnemonic, opcode, cls1, cls2>;
4414 class SideEffectQuaternaryRRFb<string mnemonic, bits<16> opcode,
4417 : InstRRFb<opcode, (outs), (ins cls1:$R1, cls2:$R2, cls3:$R3, imm32zx4:$M4),
4420 multiclass SideEffectQuaternaryRRFbOpt<string mnemonic, bits<16> opcode,
4424 def "" : SideEffectQuaternaryRRFb<mnemonic, opcode, cls1, cls2, cls3>;
4425 def Opt : SideEffectTernaryRRFb<mnemonic, opcode, cls1, cls2, cls3>;
4428 class SideEffectQuaternarySSe<string mnemonic, bits<8> opcode,
4430 : InstSSe<opcode, (outs),
4434 class LoadAndOpRSY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4436 : InstRSYa<opcode, (outs cls:$R1), (ins cls:$R3, mode:$BD2),
4443 class CmpSwapRRE<string mnemonic, bits<16> opcode,
4445 : InstRRE<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2),
4453 class CmpSwapRS<string mnemonic, bits<8> opcode, SDPatternOperator operator,
4455 : InstRSa<opcode, (outs cls:$R1), (ins cls:$R1src, cls:$R3, mode:$BD2),
4464 class CmpSwapRSY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4466 : InstRSYa<opcode, (outs cls:$R1), (ins cls:$R1src, cls:$R3, mode:$BD2),
4485 class RotateSelectRIEf<string mnemonic, bits<16> opcode, RegisterOperand cls1,
4487 : InstRIEf<opcode, (outs cls1:$R1),
4495 class PrefetchRXY<string mnemonic, bits<16> opcode, SDPatternOperator operator>
4496 : InstRXYb<opcode, (outs), (ins imm32zx4:$M1, bdxaddr20only:$XBD2),
4500 class PrefetchRILPC<string mnemonic, bits<12> opcode,
4502 : InstRILc<opcode, (outs), (ins imm32zx4:$M1, pcrel32:$RI2),
4511 class BranchPreloadSMI<string mnemonic, bits<8> opcode>
4512 : InstSMI<opcode, (outs),
4516 class BranchPreloadMII<string mnemonic, bits<8> opcode>
4517 : InstMII<opcode, (outs),
4526 multiclass LoadAndTestRRE<string mnemonic, bits<16> opcode,
4528 def "" : UnaryRRE<mnemonic, opcode, null_frag, cls, cls>;
4530 def Compare : CompareRRE<mnemonic, opcode, null_frag, cls, cls>;
4784 multiclass MemorySS<string mnemonic, bits<8> opcode,
4786 def "" : SideEffectBinarySSa<mnemonic, opcode>;
4800 multiclass CompareMemorySS<string mnemonic, bits<8> opcode,
4802 def "" : SideEffectBinarySSa<mnemonic, opcode>;
4820 multiclass StringRRE<string mnemonic, bits<16> opcode,
4823 def "" : SideEffectBinaryMemMemRRE<mnemonic, opcode, GR64, GR64>;