Lines Matching refs:Num
107 unsigned Num; member
169 createReg(RegisterKind Kind, unsigned Num, SMLoc StartLoc, SMLoc EndLoc) { in createReg() argument
172 Op->Reg.Num = Num; in createReg()
227 return Reg.Num; in getReg()
404 unsigned Num; member
714 if (Name.substr(1).getAsInteger(10, Reg.Num)) in parseRegister()
718 if (Prefix == 'r' && Reg.Num < 16) in parseRegister()
720 else if (Prefix == 'f' && Reg.Num < 16) in parseRegister()
722 else if (Prefix == 'v' && Reg.Num < 32) in parseRegister()
724 else if (Prefix == 'a' && Reg.Num < 16) in parseRegister()
726 else if (Prefix == 'c' && Reg.Num < 16) in parseRegister()
748 if (Regs && Regs[Reg.Num] == 0) in parseRegister()
750 if (Reg.Num == 0 && IsAddress) in parseRegister()
753 Reg.Num = Regs[Reg.Num]; in parseRegister()
769 Operands.push_back(SystemZOperand::createReg(Kind, Reg.Num, in parseRegister()
807 RegNo = SystemZMC::GR64Regs[Reg.Num]; in parseAnyRegister()
811 RegNo = SystemZMC::FP64Regs[Reg.Num]; in parseAnyRegister()
815 RegNo = SystemZMC::VR128Regs[Reg.Num]; in parseAnyRegister()
819 RegNo = SystemZMC::AR32Regs[Reg.Num]; in parseAnyRegister()
823 RegNo = SystemZMC::CR64Regs[Reg.Num]; in parseAnyRegister()
887 } else if (Reg.Num == 0) { in parseAddressRegister()
914 Base = Regs[Reg1.Num]; in parseAddress()
934 Index = Regs[Reg1.Num]; in parseAddress()
936 Base = Regs[Reg1.Num]; in parseAddress()
942 Base = Regs[Reg2.Num]; in parseAddress()
955 Base = Regs[Reg2.Num]; in parseAddress()
974 LengthReg = SystemZMC::GR64Regs[Reg1.Num]; in parseAddress()
979 Base = Regs[Reg2.Num]; in parseAddress()
993 Index = SystemZMC::VR128Regs[Reg1.Num]; in parseAddress()
998 Base = Regs[Reg2.Num]; in parseAddress()
1133 RegNo = SystemZMC::GR64Regs[Reg.Num]; in ParseRegister()
1135 RegNo = SystemZMC::FP64Regs[Reg.Num]; in ParseRegister()
1137 RegNo = SystemZMC::VR128Regs[Reg.Num]; in ParseRegister()
1139 RegNo = SystemZMC::AR32Regs[Reg.Num]; in ParseRegister()
1141 RegNo = SystemZMC::CR64Regs[Reg.Num]; in ParseRegister()