Lines Matching refs:getLocVT
240 assert(VA.getLocVT() == MVT::v2i32); in LowerReturn_32()
253 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
262 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
325 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
328 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
331 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
357 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_64()
418 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerFormalArguments_32()
444 WholeValue = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), WholeValue); in LowerFormalArguments_32()
451 if (VA.getLocVT() == MVT::f32) in LowerFormalArguments_32()
453 else if (VA.getLocVT() != MVT::i32) { in LowerFormalArguments_32()
455 DAG.getValueType(VA.getLocVT())); in LowerFormalArguments_32()
456 Arg = DAG.getNode(ISD::TRUNCATE, dl, VA.getLocVT(), Arg); in LowerFormalArguments_32()
601 getRegClassFor(VA.getLocVT())); in LowerFormalArguments_64()
602 SDValue Arg = DAG.getCopyFromReg(Chain, DL, VReg, VA.getLocVT()); in LowerFormalArguments_64()
606 Arg = DAG.getNode(ISD::SRL, DL, VA.getLocVT(), Arg, in LowerFormalArguments_64()
613 Arg = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Arg, in LowerFormalArguments_64()
617 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, in LowerFormalArguments_64()
806 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall_32()
809 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall_32()
812 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall_32()
815 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall_32()
837 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerCall_32()
852 if (VA.getLocVT() == MVT::f64) { in LowerCall_32()
903 if (VA.getLocVT() != MVT::f32) { in LowerCall_32()
989 if (RVLocs[i].getLocVT() == MVT::v2i32) { in LowerCall_32()
1050 MVT ValTy = VA.getLocVT(); in fixupVariableFloatArgs()
1085 Offset, VA.getLocVT(), VA.getLocInfo()); in fixupVariableFloatArgs()
1148 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall_64()
1151 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall_64()
1154 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall_64()
1160 || VA.getLocVT() != MVT::i128) in LowerCall_64()
1161 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerCall_64()
1167 && VA.getLocVT() == MVT::i128) { in LowerCall_64()
1315 RV = DAG.getCopyFromReg(Chain, DL, Reg, RVLocs[i].getLocVT(), InGlue); in LowerCall_64()
1322 RV = DAG.getNode(ISD::SRL, DL, VA.getLocVT(), RV, in LowerCall_64()
1329 RV = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), RV, in LowerCall_64()
1333 RV = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), RV, in LowerCall_64()