Lines Matching refs:Fixups
58 SmallVectorImpl<MCFixup> &Fixups,
64 SmallVectorImpl<MCFixup> &Fixups,
70 SmallVectorImpl<MCFixup> &Fixups,
74 SmallVectorImpl<MCFixup> &Fixups,
77 SmallVectorImpl<MCFixup> &Fixups,
80 SmallVectorImpl<MCFixup> &Fixups,
83 SmallVectorImpl<MCFixup> &Fixups,
95 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction() argument
100 unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI); in encodeInstruction()
115 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
125 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue() argument
137 Fixups.push_back(MCFixup::create(0, Expr, Kind)); in getMachineOpValue()
151 SmallVectorImpl<MCFixup> &Fixups, in getCallTargetOpValue() argument
155 return getMachineOpValue(MI, MO, Fixups, STI); in getCallTargetOpValue()
179 Fixups.push_back(MCFixup::create(0, MO.getExpr(), fixupKind)); in getCallTargetOpValue()
186 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValue() argument
190 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
192 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getBranchTargetOpValue()
199 SmallVectorImpl<MCFixup> &Fixups, in getBranchPredTargetOpValue() argument
203 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
205 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getBranchPredTargetOpValue()
212 SmallVectorImpl<MCFixup> &Fixups, in getBranchOnRegTargetOpValue() argument
216 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
218 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getBranchOnRegTargetOpValue()
220 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getBranchOnRegTargetOpValue()