Lines Matching refs:Cond
184 SmallVectorImpl<MachineOperand> &Cond) { in parseCondBranch() argument
189 Cond.push_back(MachineOperand::CreateImm(LastInst.getOpcode())); in parseCondBranch()
190 Cond.push_back(LastInst.getOperand(0)); in parseCondBranch()
191 Cond.push_back(LastInst.getOperand(1)); in parseCondBranch()
216 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
219 Cond.clear(); in analyzeBranch()
265 parseCondBranch(*I, TBB, Cond); in analyzeBranch()
272 parseCondBranch(*std::prev(I), TBB, Cond); in analyzeBranch()
317 ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const { in insertBranch() argument
323 assert((Cond.size() == 3 || Cond.size() == 0) && in insertBranch()
327 if (Cond.empty()) { in insertBranch()
335 unsigned Opc = Cond[0].getImm(); in insertBranch()
337 *BuildMI(&MBB, DL, get(Opc)).add(Cond[1]).add(Cond[2]).addMBB(TBB); in insertBranch()
395 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
396 assert((Cond.size() == 3) && "Invalid branch condition!"); in reverseBranchCondition()
397 Cond[0].setImm(getOppositeBranchOpcode(Cond[0].getImm())); in reverseBranchCondition()