Lines Matching refs:RISCVAsmParser
45 class RISCVAsmParser : public MCTargetAsmParser { class
150 RISCVAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser, in RISCVAsmParser() function in __anond849e6730111::RISCVAsmParser
254 IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK, Imm); in isBareSimmNLsb0()
268 return RISCVAsmParser::classifySymbolRef(getImm(), VK, Imm) && in isBareSymbol()
461 IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK, Imm); in isSImm12()
491 IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK, Imm); in isUImm20LUI()
507 IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK, Imm); in isUImm20AUIPC()
714 unsigned RISCVAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp, in validateTargetOperandClass()
736 bool RISCVAsmParser::generateImmOutOfRangeError( in generateImmOutOfRangeError()
743 bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, in MatchAndEmitInstruction()
896 bool RISCVAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, in ParseRegister()
912 OperandMatchResultTy RISCVAsmParser::parseRegister(OperandVector &Operands, in parseRegister()
958 RISCVAsmParser::parseCSRSystemRegister(OperandVector &Operands) { in parseCSRSystemRegister()
1023 OperandMatchResultTy RISCVAsmParser::parseImmediate(OperandVector &Operands) { in parseImmediate()
1049 RISCVAsmParser::parseOperandWithModifier(OperandVector &Operands) { in parseOperandWithModifier()
1088 OperandMatchResultTy RISCVAsmParser::parseBareSymbol(OperandVector &Operands) { in parseBareSymbol()
1106 OperandMatchResultTy RISCVAsmParser::parseJALOffset(OperandVector &Operands) { in parseJALOffset()
1124 RISCVAsmParser::parseMemOpBaseReg(OperandVector &Operands) { in parseMemOpBaseReg()
1152 bool RISCVAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) { in parseOperand()
1179 bool RISCVAsmParser::ParseInstruction(ParseInstructionInfo &Info, in ParseInstruction()
1231 bool RISCVAsmParser::classifySymbolRef(const MCExpr *Expr, in classifySymbolRef()
1276 bool RISCVAsmParser::ParseDirective(AsmToken DirectiveID) { in ParseDirective()
1289 bool RISCVAsmParser::parseDirectiveOption() { in parseDirectiveOption()
1383 void RISCVAsmParser::emitToStreamer(MCStreamer &S, const MCInst &Inst) { in emitToStreamer()
1390 void RISCVAsmParser::emitLoadImm(unsigned DestReg, int64_t Value, in emitLoadImm()
1411 void RISCVAsmParser::emitLoadLocalAddress(MCInst &Inst, SMLoc IDLoc, in emitLoadLocalAddress()
1442 bool RISCVAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc, in processInstruction()
1476 RegisterMCAsmParser<RISCVAsmParser> X(getTheRISCV32Target()); in LLVMInitializeRISCVAsmParser()
1477 RegisterMCAsmParser<RISCVAsmParser> Y(getTheRISCV64Target()); in LLVMInitializeRISCVAsmParser()