75   : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR,  in PPCRegisterInfo()
76                        TM.isPPC64() ? 0 : 1,  in PPCRegisterInfo()
77                        TM.isPPC64() ? 0 : 1),  in PPCRegisterInfo()
125     if (TM.isPPC64())  in getPointerRegClass()
130   if (TM.isPPC64())  in getPointerRegClass()
147     return TM.isPPC64()  in getCalleeSavedRegs()
153   if (TM.isPPC64() && MF->getInfo<PPCFunctionInfo>()->isSplitCSR())  in getCalleeSavedRegs()
163     return TM.isPPC64()  in getCalleeSavedRegs()
173   return TM.isPPC64()  in getCalleeSavedRegs()
188   if (!TM.isPPC64())  in getCalleeSavedRegsViaCopy()
220     return TM.isPPC64() ? (Subtarget.hasAltivec() ? CSR_Darwin64_Altivec_RegMask  in getCallPreservedMask()
226     return TM.isPPC64() ? (Subtarget.hasAltivec() ? CSR_SVR64_ColdCC_Altivec_RegMask  in getCallPreservedMask()
232   return TM.isPPC64() ? (Subtarget.hasAltivec() ? CSR_SVR464_Altivec_RegMask  in getCallPreservedMask()
286     if (!TM.isPPC64() || FuncInfo->usesTOCBasePtr() || MF.hasInlineAsm())  in getReservedRegs()
292   if (TM.isPPC64())  in getReservedRegs()
300     if (Subtarget.isSVR4ABI() && !TM.isPPC64() && IsPositionIndependent)  in getReservedRegs()
306   if (Subtarget.isSVR4ABI() && !TM.isPPC64() && IsPositionIndependent)  in getReservedRegs()
324   if (!TM.isPPC64())  in isCallerPreservedPhysReg()
434   bool LP64 = TM.isPPC64();  in lowerDynamicAlloc()
554   bool is64Bit = TM.isPPC64();  in lowerDynamicAreaOffset()
581   bool LP64 = TM.isPPC64();  in lowerCRSpilling()
626   bool LP64 = TM.isPPC64();  in lowerCRRestore()
669   bool LP64 = TM.isPPC64();  in lowerCRBitSpilling()
716   bool LP64 = TM.isPPC64();  in lowerCRBitRestore()
817     if (TM.isPPC64())  in hasReservedSpillSlot()
977   bool is64Bit = TM.isPPC64();  in eliminateFrameIndex()
1022   if (!TM.isPPC64())  in getFrameRegister()
1033   if (TM.isPPC64())  in getBaseRegister()
1107   unsigned ADDriOpc = TM.isPPC64() ? PPC::ADDI8 : PPC::ADDI;  in materializeFrameBaseRegister()