Lines Matching refs:MF
120 PPCRegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind) in getPointerRegClass() argument
136 PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { in getCalleeSavedRegs()
137 const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>(); in getCalleeSavedRegs()
138 if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) { in getCalleeSavedRegs()
153 if (TM.isPPC64() && MF->getInfo<PPCFunctionInfo>()->isSplitCSR()) in getCalleeSavedRegs()
160 bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2); in getCalleeSavedRegs()
162 if (MF->getFunction().getCallingConv() == CallingConv::Cold) { in getCalleeSavedRegs()
183 PPCRegisterInfo::getCalleeSavedRegsViaCopy(const MachineFunction *MF) const { in getCalleeSavedRegsViaCopy()
184 assert(MF && "Invalid MachineFunction pointer."); in getCalleeSavedRegsViaCopy()
185 const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>(); in getCalleeSavedRegsViaCopy()
190 if (MF->getFunction().getCallingConv() != CallingConv::CXX_FAST_TLS) in getCalleeSavedRegsViaCopy()
192 if (!MF->getInfo<PPCFunctionInfo>()->isSplitCSR()) in getCalleeSavedRegsViaCopy()
196 bool SaveR2 = !getReservedRegs(*MF).test(PPC::X2); in getCalleeSavedRegsViaCopy()
208 PPCRegisterInfo::getCallPreservedMask(const MachineFunction &MF, in getCallPreservedMask() argument
210 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in getCallPreservedMask()
248 BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const { in getReservedRegs()
250 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in getReservedRegs()
251 const PPCFrameLowering *TFI = getFrameLowering(MF); in getReservedRegs()
285 const PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); in getReservedRegs()
286 if (!TM.isPPC64() || FuncInfo->usesTOCBasePtr() || MF.hasInlineAsm()) in getReservedRegs()
295 if (TFI->needsFP(MF)) in getReservedRegs()
299 if (hasBasePointer(MF)) { in getReservedRegs()
320 const MachineFunction &MF) const { in isCallerPreservedPhysReg()
322 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in isCallerPreservedPhysReg()
323 const MachineFrameInfo &MFI = MF.getFrameInfo(); in isCallerPreservedPhysReg()
334 return (getReservedRegs(MF).test(PPC::X2)); in isCallerPreservedPhysReg()
345 MachineFunction &MF) const { in getRegPressureLimit()
346 const PPCFrameLowering *TFI = getFrameLowering(MF); in getRegPressureLimit()
358 unsigned FP = TFI->hasFP(MF) ? 1 : 0; in getRegPressureLimit()
381 const MachineFunction &MF) const { in getLargestLegalSuperClass()
382 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in getLargestLegalSuperClass()
407 return TargetRegisterInfo::getLargestLegalSuperClass(RC, MF); in getLargestLegalSuperClass()
427 MachineFunction &MF = *MBB.getParent(); in lowerDynamicAlloc() local
429 MachineFrameInfo &MFI = MF.getFrameInfo(); in lowerDynamicAlloc()
430 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in lowerDynamicAlloc()
443 const PPCFrameLowering *TFI = getFrameLowering(MF); in lowerDynamicAlloc()
457 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerDynamicAlloc()
486 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc()
494 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc()
511 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerDynamicAlloc()
519 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerDynamicAlloc()
546 MachineFunction &MF = *MBB.getParent(); in lowerDynamicAreaOffset() local
548 MachineFrameInfo &MFI = MF.getFrameInfo(); in lowerDynamicAreaOffset()
549 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in lowerDynamicAreaOffset()
576 MachineFunction &MF = *MBB.getParent(); in lowerCRSpilling() local
577 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in lowerCRSpilling()
585 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
597 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
621 MachineFunction &MF = *MBB.getParent(); in lowerCRRestore() local
622 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in lowerCRRestore()
630 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
642 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
664 MachineFunction &MF = *MBB.getParent(); in lowerCRBitSpilling() local
665 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in lowerCRBitSpilling()
673 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRBitSpilling()
689 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRBitSpilling()
711 MachineFunction &MF = *MBB.getParent(); in lowerCRBitRestore() local
712 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in lowerCRBitRestore()
720 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRBitRestore()
730 unsigned RegO = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRBitRestore()
761 MachineFunction &MF = *MBB.getParent(); in lowerVRSAVESpilling() local
762 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in lowerVRSAVESpilling()
767 unsigned Reg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerVRSAVESpilling()
787 MachineFunction &MF = *MBB.getParent(); in lowerVRSAVERestore() local
788 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in lowerVRSAVERestore()
793 unsigned Reg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerVRSAVERestore()
808 bool PPCRegisterInfo::hasReservedSpillSlot(const MachineFunction &MF, in hasReservedSpillSlot() argument
810 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in hasReservedSpillSlot()
820 const PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>(); in hasReservedSpillSlot()
881 MachineFunction &MF = *MBB.getParent(); in eliminateFrameIndex() local
882 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in eliminateFrameIndex()
886 MachineFrameInfo &MFI = MF.getFrameInfo(); in eliminateFrameIndex()
896 PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>(); in eliminateFrameIndex()
936 FrameIndex < 0 ? getBaseRegister(MF) : getFrameRegister(MF), false); in eliminateFrameIndex()
953 if (!MF.getFunction().hasFnAttribute(Attribute::Naked)) { in eliminateFrameIndex()
954 if (!(hasBasePointer(MF) && FrameIndex < 0)) in eliminateFrameIndex()
981 unsigned SRegHi = MF.getRegInfo().createVirtualRegister(RC), in eliminateFrameIndex()
982 SReg = MF.getRegInfo().createVirtualRegister(RC); in eliminateFrameIndex()
1019 unsigned PPCRegisterInfo::getFrameRegister(const MachineFunction &MF) const { in getFrameRegister()
1020 const PPCFrameLowering *TFI = getFrameLowering(MF); in getFrameRegister()
1023 return TFI->hasFP(MF) ? PPC::R31 : PPC::R1; in getFrameRegister()
1025 return TFI->hasFP(MF) ? PPC::X31 : PPC::X1; in getFrameRegister()
1028 unsigned PPCRegisterInfo::getBaseRegister(const MachineFunction &MF) const { in getBaseRegister()
1029 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in getBaseRegister()
1030 if (!hasBasePointer(MF)) in getBaseRegister()
1031 return getFrameRegister(MF); in getBaseRegister()
1042 bool PPCRegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer()
1051 return needsStackRealignment(MF); in hasBasePointer()
1081 MachineFunction &MF = *MBB.getParent(); in needsFrameBaseReg() local
1082 const PPCFrameLowering *TFI = getFrameLowering(MF); in needsFrameBaseReg()
1083 unsigned StackEst = TFI->determineFrameLayout(MF, false, true); in needsFrameBaseReg()
1098 return !isFrameOffsetLegal(MI, getBaseRegister(MF), Offset); in needsFrameBaseReg()
1114 const MachineFunction &MF = *MBB->getParent(); in materializeFrameBaseRegister() local
1115 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in materializeFrameBaseRegister()
1119 MRI.constrainRegClass(BaseReg, TII.getRegClass(MCID, 0, this, MF)); in materializeFrameBaseRegister()
1140 MachineFunction &MF = *MBB.getParent(); in resolveFrameIndex() local
1141 const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>(); in resolveFrameIndex()
1144 MachineRegisterInfo &MRI = MF.getRegInfo(); in resolveFrameIndex()
1146 TII.getRegClass(MCID, FIOperandNum, this, MF)); in resolveFrameIndex()