Lines Matching refs:TempReg
774 unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg in emitPrologue() local
805 &ScratchReg, &TempReg); in emitPrologue()
809 SingleScratchReg = ScratchReg == TempReg; in emitPrologue()
872 BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg); in emitPrologue()
876 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
897 BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg); in emitPrologue()
930 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
972 BuildMI(MBB, MBBI, dl, LoadImmShiftedInst, TempReg) in emitPrologue()
974 BuildMI(MBB, MBBI, dl, OrImmInst, TempReg) in emitPrologue()
975 .addReg(TempReg, RegState::Kill) in emitPrologue()
979 .addReg(TempReg, RegState::Kill); in emitPrologue()
1282 unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg in emitEpilogue() local
1304 &TempReg); in emitEpilogue()
1308 SingleScratchReg = ScratchReg == TempReg; in emitEpilogue()
1455 BuildMI(MBB, MBBI, dl, TII.get(PPC::LWZ8), TempReg) in emitEpilogue()
1460 .addReg(TempReg, getKillRegState(i == e-1)); in emitEpilogue()
1479 BuildMI(MBB, MBBI, dl, TII.get(PPC::LWZ8), TempReg) in emitEpilogue()
1538 .addReg(TempReg, getKillRegState(i == e-1)); in emitEpilogue()