206       MachineOperand &Dest = (*I)->getOperand(0);  in expandAndMergeISELs()  local
213       if (useSameRegister(Dest, TrueValue) &&  in expandAndMergeISELs()
214           useSameRegister(Dest, FalseValue)) {  in expandAndMergeISELs()
236             .add(Dest)  in expandAndMergeISELs()
273     MachineOperand &Dest = (*MI)->getOperand(0);  in handleSpecialCases()  local
283     bool IsADDIInstRequired = !useSameRegister(Dest, TrueValue);  in handleSpecialCases()
284     bool IsORIInstRequired = !useSameRegister(Dest, FalseValue);  in handleSpecialCases()
313           .add(Dest)  in handleSpecialCases()
440     MachineOperand &Dest = MI->getOperand(0);       // location to store to  in populateBlocks()  local
447     LLVM_DEBUG(dbgs() << "Dest: " << Dest << "\n");  in populateBlocks()
454     bool IsADDIInstRequired = !useSameRegister(Dest, TrueValue);  in populateBlocks()
455     bool IsORIInstRequired = !useSameRegister(Dest, FalseValue);  in populateBlocks()
461           .add(Dest)  in populateBlocks()
476       NewSuccessor->addLiveIn(Dest.getReg());  in populateBlocks()
486           .add(Dest)  in populateBlocks()