84   const TargetRegisterClass *RC = &Mips::GPR32RegClass;  in selectCopy()
117     MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDu))  in select()
124     MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))  in select()
136     if (DestRegBank != Mips::GPRBRegBankID || OpSize != 32)  in select()
139     const unsigned NewOpc = I.getOpcode() == G_STORE ? Mips::SW : Mips::LW;  in select()
152     unsigned HILOReg = MRI.createVirtualRegister(&Mips::ACC64RegClass);  in select()
158                         TII.get(IsSigned ? Mips::PseudoSDIV : Mips::PseudoUDIV))  in select()
166                          TII.get(IsDiv ? Mips::PseudoMFLO : Mips::PseudoMFHI))  in select()
177     MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::MOVN_I_I))  in select()
186     unsigned LUiReg = MRI.createVirtualRegister(&Mips::GPR32RegClass);  in select()
189     LUi = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LUi))  in select()
193     ORi = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ORi))  in select()
211     unsigned LUiReg = MRI.createVirtualRegister(&Mips::GPR32RegClass);  in select()
214     LUi = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LUi))  in select()
219     ADDiu = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))  in select()
240         if (Opcode == Mips::SLTiu || Opcode == Mips::XORi)  in select()
248     unsigned Temp = MRI.createVirtualRegister(&Mips::GPR32RegClass);  in select()
256       Instructions.emplace_back(Mips::XOR, Temp, LHS, RHS);  in select()
257       Instructions.emplace_back(Mips::SLTiu, ICMPReg, Temp, 1);  in select()
260       Instructions.emplace_back(Mips::XOR, Temp, LHS, RHS);  in select()
261       Instructions.emplace_back(Mips::SLTu, ICMPReg, Mips::ZERO, Temp);  in select()
264       Instructions.emplace_back(Mips::SLTu, ICMPReg, RHS, LHS);  in select()
267       Instructions.emplace_back(Mips::SLTu, Temp, LHS, RHS);  in select()
268       Instructions.emplace_back(Mips::XORi, ICMPReg, Temp, 1);  in select()
271       Instructions.emplace_back(Mips::SLTu, ICMPReg, LHS, RHS);  in select()
274       Instructions.emplace_back(Mips::SLTu, Temp, RHS, LHS);  in select()
275       Instructions.emplace_back(Mips::XORi, ICMPReg, Temp, 1);  in select()
278       Instructions.emplace_back(Mips::SLT, ICMPReg, RHS, LHS);  in select()
281       Instructions.emplace_back(Mips::SLT, Temp, LHS, RHS);  in select()
282       Instructions.emplace_back(Mips::XORi, ICMPReg, Temp, 1);  in select()
285       Instructions.emplace_back(Mips::SLT, ICMPReg, LHS, RHS);  in select()
288       Instructions.emplace_back(Mips::SLT, Temp, RHS, LHS);  in select()
289       Instructions.emplace_back(Mips::XORi, ICMPReg, Temp, 1);  in select()