Lines Matching refs:Mips
85 unsigned ZERO = Mips::ZERO; in expandAtomicCmpSwapSubword()
86 unsigned BNE = Mips::BNE; in expandAtomicCmpSwapSubword()
87 unsigned BEQ = Mips::BEQ; in expandAtomicCmpSwapSubword()
89 I->getOpcode() == Mips::ATOMIC_CMP_SWAP_I8_POSTRA ? Mips::SEB : Mips::SEH; in expandAtomicCmpSwapSubword()
92 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicCmpSwapSubword()
93 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicCmpSwapSubword()
94 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwapSubword()
95 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwapSubword()
97 LL = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in expandAtomicCmpSwapSubword()
98 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in expandAtomicCmpSwapSubword()
99 SC = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in expandAtomicCmpSwapSubword()
100 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in expandAtomicCmpSwapSubword()
147 BuildMI(loop1MBB, DL, TII->get(Mips::AND), Scratch2) in expandAtomicCmpSwapSubword()
158 BuildMI(loop2MBB, DL, TII->get(Mips::AND), Scratch) in expandAtomicCmpSwapSubword()
161 BuildMI(loop2MBB, DL, TII->get(Mips::OR), Scratch) in expandAtomicCmpSwapSubword()
176 BuildMI(sinkMBB, DL, TII->get(Mips::SRLV), Dest) in expandAtomicCmpSwapSubword()
183 I->getOpcode() == Mips::ATOMIC_CMP_SWAP_I16_POSTRA ? 16 : 24; in expandAtomicCmpSwapSubword()
184 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest) in expandAtomicCmpSwapSubword()
187 BuildMI(sinkMBB, DL, TII->get(Mips::SRA), Dest) in expandAtomicCmpSwapSubword()
208 I->getOpcode() == Mips::ATOMIC_CMP_SWAP_I32_POSTRA ? 4 : 8; in expandAtomicCmpSwap()
218 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicCmpSwap()
219 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicCmpSwap()
220 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwap()
221 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwap()
224 ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in expandAtomicCmpSwap()
225 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in expandAtomicCmpSwap()
227 ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in expandAtomicCmpSwap()
228 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in expandAtomicCmpSwap()
229 BNE = Mips::BNE; in expandAtomicCmpSwap()
230 BEQ = Mips::BEQ; in expandAtomicCmpSwap()
233 ZERO = Mips::ZERO; in expandAtomicCmpSwap()
234 MOVE = Mips::OR; in expandAtomicCmpSwap()
236 LL = STI->hasMips64r6() ? Mips::LLD_R6 : Mips::LLD; in expandAtomicCmpSwap()
237 SC = STI->hasMips64r6() ? Mips::SCD_R6 : Mips::SCD; in expandAtomicCmpSwap()
238 ZERO = Mips::ZERO_64; in expandAtomicCmpSwap()
239 BNE = Mips::BNE64; in expandAtomicCmpSwap()
240 BEQ = Mips::BEQ64; in expandAtomicCmpSwap()
241 MOVE = Mips::OR64; in expandAtomicCmpSwap()
313 unsigned BEQ = Mips::BEQ; in expandAtomicBinOpSubword()
314 unsigned SEOp = Mips::SEH; in expandAtomicBinOpSubword()
317 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicBinOpSubword()
318 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicBinOpSubword()
319 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicBinOpSubword()
321 LL = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in expandAtomicBinOpSubword()
322 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in expandAtomicBinOpSubword()
323 SC = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in expandAtomicBinOpSubword()
324 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in expandAtomicBinOpSubword()
332 case Mips::ATOMIC_LOAD_NAND_I8_POSTRA: in expandAtomicBinOpSubword()
333 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
335 case Mips::ATOMIC_LOAD_NAND_I16_POSTRA: in expandAtomicBinOpSubword()
338 case Mips::ATOMIC_SWAP_I8_POSTRA: in expandAtomicBinOpSubword()
339 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
341 case Mips::ATOMIC_SWAP_I16_POSTRA: in expandAtomicBinOpSubword()
344 case Mips::ATOMIC_LOAD_ADD_I8_POSTRA: in expandAtomicBinOpSubword()
345 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
347 case Mips::ATOMIC_LOAD_ADD_I16_POSTRA: in expandAtomicBinOpSubword()
348 Opcode = Mips::ADDu; in expandAtomicBinOpSubword()
350 case Mips::ATOMIC_LOAD_SUB_I8_POSTRA: in expandAtomicBinOpSubword()
351 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
353 case Mips::ATOMIC_LOAD_SUB_I16_POSTRA: in expandAtomicBinOpSubword()
354 Opcode = Mips::SUBu; in expandAtomicBinOpSubword()
356 case Mips::ATOMIC_LOAD_AND_I8_POSTRA: in expandAtomicBinOpSubword()
357 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
359 case Mips::ATOMIC_LOAD_AND_I16_POSTRA: in expandAtomicBinOpSubword()
360 Opcode = Mips::AND; in expandAtomicBinOpSubword()
362 case Mips::ATOMIC_LOAD_OR_I8_POSTRA: in expandAtomicBinOpSubword()
363 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
365 case Mips::ATOMIC_LOAD_OR_I16_POSTRA: in expandAtomicBinOpSubword()
366 Opcode = Mips::OR; in expandAtomicBinOpSubword()
368 case Mips::ATOMIC_LOAD_XOR_I8_POSTRA: in expandAtomicBinOpSubword()
369 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
371 case Mips::ATOMIC_LOAD_XOR_I16_POSTRA: in expandAtomicBinOpSubword()
372 Opcode = Mips::XOR; in expandAtomicBinOpSubword()
410 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword()
413 BuildMI(loopMBB, DL, TII->get(Mips::NOR), BinOpRes) in expandAtomicBinOpSubword()
414 .addReg(Mips::ZERO) in expandAtomicBinOpSubword()
416 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword()
425 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword()
430 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword()
439 BuildMI(loopMBB, DL, TII->get(Mips::AND), StoreVal) in expandAtomicBinOpSubword()
441 BuildMI(loopMBB, DL, TII->get(Mips::OR), StoreVal) in expandAtomicBinOpSubword()
446 .addReg(StoreVal).addReg(Mips::ZERO).addMBB(loopMBB); in expandAtomicBinOpSubword()
455 BuildMI(sinkMBB, DL, TII->get(Mips::AND), Dest) in expandAtomicBinOpSubword()
457 BuildMI(sinkMBB, DL, TII->get(Mips::SRLV), Dest) in expandAtomicBinOpSubword()
463 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword()
464 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest) in expandAtomicBinOpSubword()
467 BuildMI(sinkMBB, DL, TII->get(Mips::SRA), Dest) in expandAtomicBinOpSubword()
496 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicBinOp()
497 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicBinOp()
498 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicBinOp()
501 ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in expandAtomicBinOp()
502 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in expandAtomicBinOp()
504 ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in expandAtomicBinOp()
505 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in expandAtomicBinOp()
506 BEQ = Mips::BEQ; in expandAtomicBinOp()
509 ZERO = Mips::ZERO; in expandAtomicBinOp()
511 LL = STI->hasMips64r6() ? Mips::LLD_R6 : Mips::LLD; in expandAtomicBinOp()
512 SC = STI->hasMips64r6() ? Mips::SCD_R6 : Mips::SCD; in expandAtomicBinOp()
513 ZERO = Mips::ZERO_64; in expandAtomicBinOp()
514 BEQ = Mips::BEQ64; in expandAtomicBinOp()
528 case Mips::ATOMIC_LOAD_ADD_I32_POSTRA: in expandAtomicBinOp()
529 Opcode = Mips::ADDu; in expandAtomicBinOp()
531 case Mips::ATOMIC_LOAD_SUB_I32_POSTRA: in expandAtomicBinOp()
532 Opcode = Mips::SUBu; in expandAtomicBinOp()
534 case Mips::ATOMIC_LOAD_AND_I32_POSTRA: in expandAtomicBinOp()
535 Opcode = Mips::AND; in expandAtomicBinOp()
537 case Mips::ATOMIC_LOAD_OR_I32_POSTRA: in expandAtomicBinOp()
538 Opcode = Mips::OR; in expandAtomicBinOp()
540 case Mips::ATOMIC_LOAD_XOR_I32_POSTRA: in expandAtomicBinOp()
541 Opcode = Mips::XOR; in expandAtomicBinOp()
543 case Mips::ATOMIC_LOAD_NAND_I32_POSTRA: in expandAtomicBinOp()
545 AND = Mips::AND; in expandAtomicBinOp()
546 NOR = Mips::NOR; in expandAtomicBinOp()
548 case Mips::ATOMIC_SWAP_I32_POSTRA: in expandAtomicBinOp()
549 OR = Mips::OR; in expandAtomicBinOp()
551 case Mips::ATOMIC_LOAD_ADD_I64_POSTRA: in expandAtomicBinOp()
552 Opcode = Mips::DADDu; in expandAtomicBinOp()
554 case Mips::ATOMIC_LOAD_SUB_I64_POSTRA: in expandAtomicBinOp()
555 Opcode = Mips::DSUBu; in expandAtomicBinOp()
557 case Mips::ATOMIC_LOAD_AND_I64_POSTRA: in expandAtomicBinOp()
558 Opcode = Mips::AND64; in expandAtomicBinOp()
560 case Mips::ATOMIC_LOAD_OR_I64_POSTRA: in expandAtomicBinOp()
561 Opcode = Mips::OR64; in expandAtomicBinOp()
563 case Mips::ATOMIC_LOAD_XOR_I64_POSTRA: in expandAtomicBinOp()
564 Opcode = Mips::XOR64; in expandAtomicBinOp()
566 case Mips::ATOMIC_LOAD_NAND_I64_POSTRA: in expandAtomicBinOp()
568 AND = Mips::AND64; in expandAtomicBinOp()
569 NOR = Mips::NOR64; in expandAtomicBinOp()
571 case Mips::ATOMIC_SWAP_I64_POSTRA: in expandAtomicBinOp()
572 OR = Mips::OR64; in expandAtomicBinOp()
628 case Mips::ATOMIC_CMP_SWAP_I32_POSTRA: in expandMI()
629 case Mips::ATOMIC_CMP_SWAP_I64_POSTRA: in expandMI()
631 case Mips::ATOMIC_CMP_SWAP_I8_POSTRA: in expandMI()
632 case Mips::ATOMIC_CMP_SWAP_I16_POSTRA: in expandMI()
634 case Mips::ATOMIC_SWAP_I8_POSTRA: in expandMI()
635 case Mips::ATOMIC_SWAP_I16_POSTRA: in expandMI()
636 case Mips::ATOMIC_LOAD_NAND_I8_POSTRA: in expandMI()
637 case Mips::ATOMIC_LOAD_NAND_I16_POSTRA: in expandMI()
638 case Mips::ATOMIC_LOAD_ADD_I8_POSTRA: in expandMI()
639 case Mips::ATOMIC_LOAD_ADD_I16_POSTRA: in expandMI()
640 case Mips::ATOMIC_LOAD_SUB_I8_POSTRA: in expandMI()
641 case Mips::ATOMIC_LOAD_SUB_I16_POSTRA: in expandMI()
642 case Mips::ATOMIC_LOAD_AND_I8_POSTRA: in expandMI()
643 case Mips::ATOMIC_LOAD_AND_I16_POSTRA: in expandMI()
644 case Mips::ATOMIC_LOAD_OR_I8_POSTRA: in expandMI()
645 case Mips::ATOMIC_LOAD_OR_I16_POSTRA: in expandMI()
646 case Mips::ATOMIC_LOAD_XOR_I8_POSTRA: in expandMI()
647 case Mips::ATOMIC_LOAD_XOR_I16_POSTRA: in expandMI()
649 case Mips::ATOMIC_LOAD_ADD_I32_POSTRA: in expandMI()
650 case Mips::ATOMIC_LOAD_SUB_I32_POSTRA: in expandMI()
651 case Mips::ATOMIC_LOAD_AND_I32_POSTRA: in expandMI()
652 case Mips::ATOMIC_LOAD_OR_I32_POSTRA: in expandMI()
653 case Mips::ATOMIC_LOAD_XOR_I32_POSTRA: in expandMI()
654 case Mips::ATOMIC_LOAD_NAND_I32_POSTRA: in expandMI()
655 case Mips::ATOMIC_SWAP_I32_POSTRA: in expandMI()
657 case Mips::ATOMIC_LOAD_ADD_I64_POSTRA: in expandMI()
658 case Mips::ATOMIC_LOAD_SUB_I64_POSTRA: in expandMI()
659 case Mips::ATOMIC_LOAD_AND_I64_POSTRA: in expandMI()
660 case Mips::ATOMIC_LOAD_OR_I64_POSTRA: in expandMI()
661 case Mips::ATOMIC_LOAD_XOR_I64_POSTRA: in expandMI()
662 case Mips::ATOMIC_LOAD_NAND_I64_POSTRA: in expandMI()
663 case Mips::ATOMIC_SWAP_I64_POSTRA: in expandMI()