Lines Matching refs:TII
168 const MipsInstrInfo *TII; member in __anoncb5f2bef0111::MipsBranchExpansion
300 MBBInfos[I].Size += TII->getInstSizeInBytes(*MI); in initMBBInfo()
338 unsigned NewOpc = TII->getOppositeBranchOpc(Br->getOpcode()); in replaceBranch()
339 const MCInstrDesc &NewDesc = TII->get(NewOpc); in replaceBranch()
388 BuildMI(*MBB, Pos, DL, TII->get(JumpOp)).addReg(ATReg); in buildProperJumpMI()
457 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
460 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)) in expandToLongBranch()
481 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT) in expandToLongBranch()
486 BuildMI(*MFp, DL, TII->get(BalOp)).addMBB(BalTgtMBB); in expandToLongBranch()
488 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT) in expandToLongBranch()
503 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch()
506 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) in expandToLongBranch()
518 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
524 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::NOP)); in expandToLongBranch()
526 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
580 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) in expandToLongBranch()
583 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SD)) in expandToLongBranch()
587 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu), in expandToLongBranch()
592 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
597 BuildMI(*MFp, DL, TII->get(BalOp)).addMBB(BalTgtMBB); in expandToLongBranch()
599 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_DADDiu), Mips::AT_64) in expandToLongBranch()
614 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDu), Mips::AT_64) in expandToLongBranch()
617 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LD), Mips::RA_64) in expandToLongBranch()
624 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::DADDiu), in expandToLongBranch()
629 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) in expandToLongBranch()
651 if (STI->hasMips32r6() && TII->isBranchOffsetInRange(Mips::BC, I.Offset)) { in expandToLongBranch()
658 TII->get(STI->inMicroMipsMode() ? Mips::BC_MMR6 : Mips::BC)) in expandToLongBranch()
668 .append(BuildMI(*MFp, DL, TII->get(Mips::J)).addMBB(TgtMBB)) in expandToLongBranch()
669 .append(BuildMI(*MFp, DL, TII->get(Mips::NOP))); in expandToLongBranch()
677 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op_64), in expandToLongBranch()
680 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
684 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
687 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
691 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
694 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
699 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op), in expandToLongBranch()
702 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_ADDiu2Op), in expandToLongBranch()
721 static void emitGPDisp(MachineFunction &F, const MipsInstrInfo *TII) { in emitGPDisp() argument
725 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0) in emitGPDisp()
727 BuildMI(MBB, I, DL, TII->get(Mips::ADDiu), Mips::V0) in emitGPDisp()
744 if (!TII->HasForbiddenSlot(*I)) in handleForbiddenSlot()
756 if (LastInstInFunction || !TII->SafeInForbiddenSlot(*Inst)) { in handleForbiddenSlot()
763 BuildMI(*MFp, I->getDebugLoc(), TII->get(Mips::NOP))); in handleForbiddenSlot()
807 !TII->isBranchOffsetInRange(Br->getOpcode(), Offset)) { in handlePossibleLongBranch()
840 TII = static_cast<const MipsInstrInfo *>(STI->getInstrInfo()); in runOnMachineFunction()
844 emitGPDisp(MF, TII); in runOnMachineFunction()