Lines Matching refs:Mips
372 unsigned JR = ABI.IsN64() ? Mips::JR64 : Mips::JR; in buildProperJumpMI()
373 unsigned JIC = ABI.IsN64() ? Mips::JIC64 : Mips::JIC; in buildProperJumpMI()
374 unsigned JR_HB = ABI.IsN64() ? Mips::JR_HB64 : Mips::JR_HB; in buildProperJumpMI()
375 unsigned JR_HB_R6 = ABI.IsN64() ? Mips::JR_HB64_R6 : Mips::JR_HB_R6; in buildProperJumpMI()
383 if (JumpOp == Mips::JIC && STI->inMicroMipsMode()) in buildProperJumpMI()
384 JumpOp = Mips::JIC_MMR6; in buildProperJumpMI()
386 unsigned ATReg = ABI.IsN64() ? Mips::AT_64 : Mips::AT; in buildProperJumpMI()
422 ? STI->inMicroMipsMode() ? Mips::BALC_MMR6 : Mips::BALC in expandToLongBranch()
423 : STI->inMicroMipsMode() ? Mips::BAL_BR_MM : Mips::BAL_BR; in expandToLongBranch()
457 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
458 .addReg(Mips::SP) in expandToLongBranch()
460 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)) in expandToLongBranch()
461 .addReg(Mips::RA) in expandToLongBranch()
462 .addReg(Mips::SP) in expandToLongBranch()
481 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT) in expandToLongBranch()
488 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT) in expandToLongBranch()
489 .addReg(Mips::AT) in expandToLongBranch()
503 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch()
504 .addReg(Mips::RA) in expandToLongBranch()
505 .addReg(Mips::AT); in expandToLongBranch()
506 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) in expandToLongBranch()
507 .addReg(Mips::SP) in expandToLongBranch()
518 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
519 .addReg(Mips::SP) in expandToLongBranch()
524 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::NOP)); in expandToLongBranch()
526 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
527 .addReg(Mips::SP) in expandToLongBranch()
580 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) in expandToLongBranch()
581 .addReg(Mips::SP_64) in expandToLongBranch()
583 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SD)) in expandToLongBranch()
584 .addReg(Mips::RA_64) in expandToLongBranch()
585 .addReg(Mips::SP_64) in expandToLongBranch()
587 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu), in expandToLongBranch()
588 Mips::AT_64) in expandToLongBranch()
589 .addReg(Mips::ZERO_64) in expandToLongBranch()
592 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
593 .addReg(Mips::AT_64) in expandToLongBranch()
599 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_DADDiu), Mips::AT_64) in expandToLongBranch()
600 .addReg(Mips::AT_64) in expandToLongBranch()
614 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDu), Mips::AT_64) in expandToLongBranch()
615 .addReg(Mips::RA_64) in expandToLongBranch()
616 .addReg(Mips::AT_64); in expandToLongBranch()
617 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LD), Mips::RA_64) in expandToLongBranch()
618 .addReg(Mips::SP_64) in expandToLongBranch()
624 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::DADDiu), in expandToLongBranch()
625 Mips::SP_64) in expandToLongBranch()
626 .addReg(Mips::SP_64) in expandToLongBranch()
629 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) in expandToLongBranch()
630 .addReg(Mips::SP_64) in expandToLongBranch()
651 if (STI->hasMips32r6() && TII->isBranchOffsetInRange(Mips::BC, I.Offset)) { in expandToLongBranch()
658 TII->get(STI->inMicroMipsMode() ? Mips::BC_MMR6 : Mips::BC)) in expandToLongBranch()
668 .append(BuildMI(*MFp, DL, TII->get(Mips::J)).addMBB(TgtMBB)) in expandToLongBranch()
669 .append(BuildMI(*MFp, DL, TII->get(Mips::NOP))); in expandToLongBranch()
677 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op_64), in expandToLongBranch()
678 Mips::AT_64) in expandToLongBranch()
680 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
681 Mips::AT_64) in expandToLongBranch()
682 .addReg(Mips::AT_64) in expandToLongBranch()
684 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
685 .addReg(Mips::AT_64) in expandToLongBranch()
687 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
688 Mips::AT_64) in expandToLongBranch()
689 .addReg(Mips::AT_64) in expandToLongBranch()
691 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
692 .addReg(Mips::AT_64) in expandToLongBranch()
694 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
695 Mips::AT_64) in expandToLongBranch()
696 .addReg(Mips::AT_64) in expandToLongBranch()
699 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op), in expandToLongBranch()
700 Mips::AT) in expandToLongBranch()
702 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_ADDiu2Op), in expandToLongBranch()
703 Mips::AT) in expandToLongBranch()
704 .addReg(Mips::AT) in expandToLongBranch()
725 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0) in emitGPDisp()
727 BuildMI(MBB, I, DL, TII->get(Mips::ADDiu), Mips::V0) in emitGPDisp()
728 .addReg(Mips::V0) in emitGPDisp()
730 MBB.removeLiveIn(Mips::V0); in emitGPDisp()
760 std::next(Iit)->getOpcode() != Mips::NOP) { in handleForbiddenSlot()
763 BuildMI(*MFp, I->getDebugLoc(), TII->get(Mips::NOP))); in handleForbiddenSlot()