227   emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg, SMLoc(),  in emitAddu()
235     emitRRI(Mips::DSLL32, DstReg, SrcReg, ShiftAmount - 32, IDLoc, STI);  in emitDSLL()
239   emitRRI(Mips::DSLL, DstReg, SrcReg, ShiftAmount, IDLoc, STI);  in emitDSLL()
245     emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);  in emitEmptyDelaySlot()
247     emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);  in emitEmptyDelaySlot()
252   if (Features[Mips::FeatureMicroMips])  in emitNop()
253     emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);  in emitNop()
255     emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);  in emitNop()
261   emitLoadWithImmOffset(Mips::LW, Mips::GP, Mips::SP, Offset, Mips::GP, IDLoc,  in emitGPRestore()
292   emitRI(Mips::LUi, ATReg, HiOffset, IDLoc, STI);  in emitStoreWithImmOffset()
293   if (BaseReg != Mips::ZERO)  in emitStoreWithImmOffset()
294     emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);  in emitStoreWithImmOffset()
309   emitRX(Mips::LUi, ATReg, HiOperand, IDLoc, STI);  in emitStoreWithSymOffset()
310   if (BaseReg != Mips::ZERO)  in emitStoreWithSymOffset()
311     emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);  in emitStoreWithSymOffset()
345   emitRI(Mips::LUi, TmpReg, HiOffset, IDLoc, STI);  in emitLoadWithImmOffset()
346   if (BaseReg != Mips::ZERO)  in emitLoadWithImmOffset()
347     emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);  in emitLoadWithImmOffset()
369   emitRX(Mips::LUi, TmpReg, HiOperand, IDLoc, STI);  in emitLoadWithSymOffset()
370   if (BaseReg != Mips::ZERO)  in emitLoadWithSymOffset()
371     emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);  in emitLoadWithSymOffset()
812   if (Features[Mips::FeatureMips64r6])  in MipsTargetELFStreamer()
814   else if (Features[Mips::FeatureMips64r2] ||  in MipsTargetELFStreamer()
815            Features[Mips::FeatureMips64r3] ||  in MipsTargetELFStreamer()
816            Features[Mips::FeatureMips64r5])  in MipsTargetELFStreamer()
818   else if (Features[Mips::FeatureMips64])  in MipsTargetELFStreamer()
820   else if (Features[Mips::FeatureMips5])  in MipsTargetELFStreamer()
822   else if (Features[Mips::FeatureMips4])  in MipsTargetELFStreamer()
824   else if (Features[Mips::FeatureMips3])  in MipsTargetELFStreamer()
826   else if (Features[Mips::FeatureMips32r6])  in MipsTargetELFStreamer()
828   else if (Features[Mips::FeatureMips32r2] ||  in MipsTargetELFStreamer()
829            Features[Mips::FeatureMips32r3] ||  in MipsTargetELFStreamer()
830            Features[Mips::FeatureMips32r5])  in MipsTargetELFStreamer()
832   else if (Features[Mips::FeatureMips32])  in MipsTargetELFStreamer()
834   else if (Features[Mips::FeatureMips2])  in MipsTargetELFStreamer()
840   if (Features[Mips::FeatureCnMips])  in MipsTargetELFStreamer()
844   if (Features[Mips::FeatureNaN2008])  in MipsTargetELFStreamer()
910   if (Features[Mips::FeatureGP64Bit]) {  in finish()
913   } else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])  in finish()
918   if (!Features[Mips::FeatureNoABICalls])  in finish()
1138   TmpInst.setOpcode(Mips::LUi);  in emitDirectiveCpLoad()
1139   TmpInst.addOperand(MCOperand::createReg(Mips::GP));  in emitDirectiveCpLoad()
1150   TmpInst.setOpcode(Mips::ADDiu);  in emitDirectiveCpLoad()
1151   TmpInst.addOperand(MCOperand::createReg(Mips::GP));  in emitDirectiveCpLoad()
1152   TmpInst.addOperand(MCOperand::createReg(Mips::GP));  in emitDirectiveCpLoad()
1163   TmpInst.setOpcode(Mips::ADDu);  in emitDirectiveCpLoad()
1164   TmpInst.addOperand(MCOperand::createReg(Mips::GP));  in emitDirectiveCpLoad()
1165   TmpInst.addOperand(MCOperand::createReg(Mips::GP));  in emitDirectiveCpLoad()
1188   emitStoreWithImmOffset(Mips::SW, Mips::GP, Mips::SP, Offset, GetATReg, IDLoc,  in emitDirectiveCpRestore()
1209     emitRRR(Mips::OR64, RegOrOffset, Mips::GP, Mips::ZERO, SMLoc(), &STI);  in emitDirectiveCpsetup()
1212     emitRRI(Mips::SD, Mips::GP, Mips::SP, RegOrOffset, SMLoc(), &STI);  in emitDirectiveCpsetup()
1225     emitRX(Mips::LUi, Mips::GP, MCOperand::createExpr(HiExpr), SMLoc(), &STI);  in emitDirectiveCpsetup()
1228     emitRRX(Mips::ADDiu, Mips::GP, Mips::GP, MCOperand::createExpr(LoExpr),  in emitDirectiveCpsetup()
1242   emitRX(Mips::LUi, Mips::GP, MCOperand::createExpr(HiExpr), SMLoc(), &STI);  in emitDirectiveCpsetup()
1245   emitRRX(Mips::ADDiu, Mips::GP, Mips::GP, MCOperand::createExpr(LoExpr),  in emitDirectiveCpsetup()
1249   emitRRR(Mips::DADDu, Mips::GP, Mips::GP, RegNo, SMLoc(), &STI);  in emitDirectiveCpsetup()
1261     Inst.setOpcode(Mips::OR);  in emitDirectiveCpreturn()
1262     Inst.addOperand(MCOperand::createReg(Mips::GP));  in emitDirectiveCpreturn()
1264     Inst.addOperand(MCOperand::createReg(Mips::ZERO));  in emitDirectiveCpreturn()
1266     Inst.setOpcode(Mips::LD);  in emitDirectiveCpreturn()
1267     Inst.addOperand(MCOperand::createReg(Mips::GP));  in emitDirectiveCpreturn()
1268     Inst.addOperand(MCOperand::createReg(Mips::SP));  in emitDirectiveCpreturn()