267     unsigned Opcode, unsigned SrcReg, unsigned BaseReg, int64_t Offset,  in emitStoreWithImmOffset()  argument
271     emitRRI(Opcode, SrcReg, BaseReg, Offset, IDLoc, STI);  in emitStoreWithImmOffset()
293   if (BaseReg != Mips::ZERO)  in emitStoreWithImmOffset()
294     emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);  in emitStoreWithImmOffset()
302     unsigned Opcode, unsigned SrcReg, unsigned BaseReg, MCOperand &HiOperand,  in emitStoreWithSymOffset()  argument
310   if (BaseReg != Mips::ZERO)  in emitStoreWithSymOffset()
311     emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);  in emitStoreWithSymOffset()
321                                                unsigned BaseReg, int64_t Offset,  in emitLoadWithImmOffset()  argument
325     emitRRI(Opcode, DstReg, BaseReg, Offset, IDLoc, STI);  in emitLoadWithImmOffset()
346   if (BaseReg != Mips::ZERO)  in emitLoadWithImmOffset()
347     emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);  in emitLoadWithImmOffset()
358                                                unsigned BaseReg,  in emitLoadWithSymOffset()  argument
370   if (BaseReg != Mips::ZERO)  in emitLoadWithSymOffset()
371     emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);  in emitLoadWithSymOffset()