Lines Matching refs:Decoder
84 const void *Decoder);
89 const void *Decoder);
94 const void *Decoder);
99 const void *Decoder);
104 const void *Decoder);
109 const void *Decoder);
114 const void *Decoder);
119 const void *Decoder);
124 const void *Decoder);
129 const void *Decoder);
134 const void *Decoder);
139 const void *Decoder);
143 const void *Decoder);
148 const void *Decoder);
153 const void *Decoder);
158 const void *Decoder);
163 const void *Decoder);
168 const void *Decoder);
173 const void *Decoder);
178 const void *Decoder);
183 const void *Decoder);
188 const void *Decoder);
193 const void *Decoder);
198 const void *Decoder);
203 const void *Decoder);
208 const void *Decoder);
213 const void *Decoder);
218 const void *Decoder);
223 const void *Decoder);
228 const void *Decoder);
233 const void *Decoder);
240 const void *Decoder);
247 const void *Decoder);
254 const void *Decoder);
261 const void *Decoder);
268 const void *Decoder);
273 const void *Decoder);
278 const void *Decoder);
283 const void *Decoder);
286 const void *Decoder);
291 const void *Decoder);
296 const void *Decoder);
301 const void *Decoder);
306 const void *Decoder);
311 const void *Decoder);
316 const void *Decoder);
319 uint64_t Address, const void *Decoder);
324 const void *Decoder);
329 const void *Decoder);
334 const void *Decoder);
339 const void *Decoder);
344 const void *Decoder);
349 const void *Decoder);
354 const void *Decoder);
358 const void *Decoder);
362 const void *Decoder);
365 const void *Decoder);
368 const void *Decoder);
371 uint64_t Address, const void *Decoder);
375 const void *Decoder);
380 const void *Decoder);
385 const void *Decoder);
390 const void *Decoder);
395 const void *Decoder);
400 const void *Decoder);
405 const void *Decoder) { in DecodeUImmWithOffset() argument
407 Decoder); in DecodeUImmWithOffset()
413 const void *Decoder);
418 const void *Decoder);
421 uint64_t Address, const void *Decoder);
424 uint64_t Address, const void *Decoder);
427 uint64_t Address, const void *Decoder);
430 uint64_t Address, const void *Decoder);
433 uint64_t Address, const void *Decoder);
439 const void *Decoder);
443 const void *Decoder);
447 const void *Decoder);
451 const void *Decoder);
455 const void *Decoder);
460 const void *Decoder);
465 const void *Decoder);
470 const void *Decoder);
475 const void *Decoder);
480 const void *Decoder);
485 const void *Decoder);
490 const void *Decoder);
495 const void *Decoder);
500 const void *Decoder);
505 const void *Decoder);
510 const void *Decoder);
515 const void *Decoder);
519 const void *Decoder);
523 const void *Decoder);
527 const void *Decoder);
531 const void *Decoder);
535 const void *Decoder);
539 const void *Decoder);
542 uint64_t Address, const void *Decoder);
589 const void *Decoder) { in DecodeINSVE_DF() argument
616 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) in DecodeINSVE_DF()
619 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) in DecodeINSVE_DF()
626 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) in DecodeINSVE_DF()
636 const void *Decoder) { in DecodeDAHIDATIMMR6() argument
639 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATIMMR6()
641 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATIMMR6()
650 const void *Decoder) { in DecodeDAHIDATI() argument
653 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATI()
655 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATI()
665 const void *Decoder) { in DecodeAddiGroupBranch() argument
691 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeAddiGroupBranch()
694 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeAddiGroupBranch()
704 const void *Decoder) { in DecodePOP35GroupBranchMMR6() argument
711 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6()
713 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6()
718 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6()
720 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6()
725 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6()
738 const void *Decoder) { in DecodeDaddiGroupBranch() argument
764 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeDaddiGroupBranch()
767 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeDaddiGroupBranch()
777 const void *Decoder) { in DecodePOP37GroupBranchMMR6() argument
784 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP37GroupBranchMMR6()
786 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP37GroupBranchMMR6()
791 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP37GroupBranchMMR6()
793 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP37GroupBranchMMR6()
798 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP37GroupBranchMMR6()
811 const void *Decoder) { in DecodePOP65GroupBranchMMR6() argument
836 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP65GroupBranchMMR6()
839 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP65GroupBranchMMR6()
850 const void *Decoder) { in DecodePOP75GroupBranchMMR6() argument
875 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP75GroupBranchMMR6()
878 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP75GroupBranchMMR6()
889 const void *Decoder) { in DecodeBlezlGroupBranch() argument
918 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBlezlGroupBranch()
921 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBlezlGroupBranch()
932 const void *Decoder) { in DecodeBgtzlGroupBranch() argument
962 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBgtzlGroupBranch()
965 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBgtzlGroupBranch()
976 const void *Decoder) { in DecodeBgtzGroupBranch() argument
1010 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBgtzGroupBranch()
1014 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBgtzGroupBranch()
1025 const void *Decoder) { in DecodeBlezGroupBranch() argument
1054 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBlezGroupBranch()
1056 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBlezGroupBranch()
1068 const void *Decoder) { in DecodeDEXT() argument
1096 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rt))); in DecodeDEXT()
1097 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rs))); in DecodeDEXT()
1108 const void *Decoder) { in DecodeDINS() argument
1137 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rt))); in DecodeDINS()
1138 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rs))); in DecodeDINS()
1148 const void *Decoder) { in DecodeCRC() argument
1151 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeCRC()
1153 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeCRC()
1155 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeCRC()
1388 const void *Decoder) { in DecodeCPU16RegsRegisterClass() argument
1395 const void *Decoder) { in DecodeGPR64RegisterClass() argument
1399 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo); in DecodeGPR64RegisterClass()
1407 const void *Decoder) { in DecodeGPRMM16RegisterClass() argument
1410 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo); in DecodeGPRMM16RegisterClass()
1418 const void *Decoder) { in DecodeGPRMM16ZeroRegisterClass() argument
1421 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo); in DecodeGPRMM16ZeroRegisterClass()
1429 const void *Decoder) { in DecodeGPRMM16MovePRegisterClass() argument
1432 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo); in DecodeGPRMM16MovePRegisterClass()
1440 const void *Decoder) { in DecodeGPR32RegisterClass() argument
1443 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo); in DecodeGPR32RegisterClass()
1451 const void *Decoder) { in DecodePtrRegisterClass() argument
1452 if (static_cast<const MipsDisassembler *>(Decoder)->isGP64()) in DecodePtrRegisterClass()
1453 return DecodeGPR64RegisterClass(Inst, RegNo, Address, Decoder); in DecodePtrRegisterClass()
1455 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder); in DecodePtrRegisterClass()
1461 const void *Decoder) { in DecodeDSPRRegisterClass() argument
1462 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder); in DecodeDSPRRegisterClass()
1468 const void *Decoder) { in DecodeFGR64RegisterClass() argument
1472 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo); in DecodeFGR64RegisterClass()
1480 const void *Decoder) { in DecodeFGR32RegisterClass() argument
1484 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo); in DecodeFGR32RegisterClass()
1492 const void *Decoder) { in DecodeCCRRegisterClass() argument
1495 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo); in DecodeCCRRegisterClass()
1503 const void *Decoder) { in DecodeFCCRegisterClass() argument
1506 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo); in DecodeFCCRegisterClass()
1513 const void *Decoder) { in DecodeFGRCCRegisterClass() argument
1517 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo); in DecodeFGRCCRegisterClass()
1525 const void *Decoder) { in DecodeMem() argument
1530 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMem()
1531 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMem()
1547 const void *Decoder) { in DecodeMemEVA() argument
1552 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemEVA()
1553 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMemEVA()
1568 const void *Decoder) { in DecodeLoadByte15() argument
1573 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeLoadByte15()
1574 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeLoadByte15()
1586 const void *Decoder) { in DecodeCacheOp() argument
1591 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeCacheOp()
1603 const void *Decoder) { in DecodeCacheOpMM() argument
1608 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeCacheOpMM()
1620 const void *Decoder) { in DecodePrefeOpMM() argument
1625 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodePrefeOpMM()
1637 const void *Decoder) { in DecodeCacheeOp_CacheOpR6() argument
1642 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeCacheeOp_CacheOpR6()
1654 const void *Decoder) { in DecodeSyncI() argument
1658 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeSyncI()
1667 uint64_t Address, const void *Decoder) { in DecodeSyncI_MM() argument
1671 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeSyncI_MM()
1682 const void *Decoder) { in DecodeSynciR6() argument
1686 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeSynciR6()
1695 uint64_t Address, const void *Decoder) { in DecodeMSA128Mem() argument
1700 Reg = getReg(Decoder, Mips::MSA128BRegClassID, Reg); in DecodeMSA128Mem()
1701 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMSA128Mem()
1743 const void *Decoder) { in DecodeMemMMImm4() argument
1752 if (DecodeGPRMM16RegisterClass(Inst, Reg, Address, Decoder) in DecodeMemMMImm4()
1762 if (DecodeGPRMM16ZeroRegisterClass(Inst, Reg, Address, Decoder) in DecodeMemMMImm4()
1768 if (DecodeGPRMM16RegisterClass(Inst, Base, Address, Decoder) in DecodeMemMMImm4()
1801 const void *Decoder) { in DecodeMemMMSPImm5Lsl2() argument
1805 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMSPImm5Lsl2()
1817 const void *Decoder) { in DecodeMemMMGPImm7Lsl2() argument
1821 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMGPImm7Lsl2()
1833 const void *Decoder) { in DecodeMemMMReglistImm4Lsl2() argument
1845 if (DecodeRegListOperand16(Inst, Insn, Address, Decoder) in DecodeMemMMReglistImm4Lsl2()
1858 const void *Decoder) { in DecodeMemMMImm9() argument
1863 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMImm9()
1864 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMemMMImm9()
1879 const void *Decoder) { in DecodeMemMMImm12() argument
1884 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMImm12()
1885 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMemMMImm12()
1890 if (DecodeRegListOperand(Inst, Insn, Address, Decoder) in DecodeMemMMImm12()
1914 const void *Decoder) { in DecodeMemMMImm16() argument
1919 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMImm16()
1920 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMemMMImm16()
1932 const void *Decoder) { in DecodeFMem() argument
1937 Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg); in DecodeFMem()
1938 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMem()
1948 uint64_t Address, const void *Decoder) { in DecodeFMemMMR2() argument
1955 Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg); in DecodeFMemMMR2()
1956 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMemMMR2()
1968 const void *Decoder) { in DecodeFMem2() argument
1973 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); in DecodeFMem2()
1974 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMem2()
1986 const void *Decoder) { in DecodeFMem3() argument
1991 Reg = getReg(Decoder, Mips::COP3RegClassID, Reg); in DecodeFMem3()
1992 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMem3()
2004 const void *Decoder) { in DecodeFMemCop2R6() argument
2009 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); in DecodeFMemCop2R6()
2010 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMemCop2R6()
2020 uint64_t Address, const void *Decoder) { in DecodeFMemCop2MMR6() argument
2025 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); in DecodeFMemCop2MMR6()
2026 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMemCop2MMR6()
2038 const void *Decoder) { in DecodeSpecial3LlSc() argument
2043 Rt = getReg(Decoder, Mips::GPR32RegClassID, Rt); in DecodeSpecial3LlSc()
2044 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeSpecial3LlSc()
2060 const void *Decoder) { in DecodeHWRegsRegisterClass() argument
2071 const void *Decoder) { in DecodeAFGR64RegisterClass() argument
2075 unsigned Reg = getReg(Decoder, Mips::AFGR64RegClassID, RegNo /2); in DecodeAFGR64RegisterClass()
2083 const void *Decoder) { in DecodeACC64DSPRegisterClass() argument
2087 unsigned Reg = getReg(Decoder, Mips::ACC64DSPRegClassID, RegNo); in DecodeACC64DSPRegisterClass()
2095 const void *Decoder) { in DecodeHI32DSPRegisterClass() argument
2099 unsigned Reg = getReg(Decoder, Mips::HI32DSPRegClassID, RegNo); in DecodeHI32DSPRegisterClass()
2107 const void *Decoder) { in DecodeLO32DSPRegisterClass() argument
2111 unsigned Reg = getReg(Decoder, Mips::LO32DSPRegClassID, RegNo); in DecodeLO32DSPRegisterClass()
2119 const void *Decoder) { in DecodeMSA128BRegisterClass() argument
2123 unsigned Reg = getReg(Decoder, Mips::MSA128BRegClassID, RegNo); in DecodeMSA128BRegisterClass()
2131 const void *Decoder) { in DecodeMSA128HRegisterClass() argument
2135 unsigned Reg = getReg(Decoder, Mips::MSA128HRegClassID, RegNo); in DecodeMSA128HRegisterClass()
2143 const void *Decoder) { in DecodeMSA128WRegisterClass() argument
2147 unsigned Reg = getReg(Decoder, Mips::MSA128WRegClassID, RegNo); in DecodeMSA128WRegisterClass()
2155 const void *Decoder) { in DecodeMSA128DRegisterClass() argument
2159 unsigned Reg = getReg(Decoder, Mips::MSA128DRegClassID, RegNo); in DecodeMSA128DRegisterClass()
2167 const void *Decoder) { in DecodeMSACtrlRegisterClass() argument
2171 unsigned Reg = getReg(Decoder, Mips::MSACtrlRegClassID, RegNo); in DecodeMSACtrlRegisterClass()
2179 const void *Decoder) { in DecodeCOP0RegisterClass() argument
2183 unsigned Reg = getReg(Decoder, Mips::COP0RegClassID, RegNo); in DecodeCOP0RegisterClass()
2191 const void *Decoder) { in DecodeCOP2RegisterClass() argument
2195 unsigned Reg = getReg(Decoder, Mips::COP2RegClassID, RegNo); in DecodeCOP2RegisterClass()
2203 const void *Decoder) { in DecodeBranchTarget() argument
2212 const void *Decoder) { in DecodeBranchTarget1SImm16() argument
2221 const void *Decoder) { in DecodeJumpTarget() argument
2230 const void *Decoder) { in DecodeBranchTarget21() argument
2240 const void *Decoder) { in DecodeBranchTarget21MM() argument
2250 const void *Decoder) { in DecodeBranchTarget26() argument
2260 const void *Decoder) { in DecodeBranchTarget7MM() argument
2269 const void *Decoder) { in DecodeBranchTarget10MM() argument
2278 const void *Decoder) { in DecodeBranchTargetMM() argument
2287 const void *Decoder) { in DecodeBranchTarget26MM() argument
2297 const void *Decoder) { in DecodeJumpTargetMM() argument
2306 const void *Decoder) { in DecodeAddiur2Simm7() argument
2319 const void *Decoder) { in DecodeLi16Imm() argument
2330 const void *Decoder) { in DecodePOOL16BEncodedField() argument
2338 const void *Decoder) { in DecodeUImmWithOffsetAndScale() argument
2348 const void *Decoder) { in DecodeSImmWithOffsetAndScale() argument
2357 const void *Decoder) { in DecodeInsSize() argument
2368 uint64_t Address, const void *Decoder) { in DecodeSimm19Lsl2() argument
2374 uint64_t Address, const void *Decoder) { in DecodeSimm18Lsl3() argument
2380 uint64_t Address, const void *Decoder) { in DecodeSimm9SP() argument
2394 uint64_t Address, const void *Decoder) { in DecodeANDI16Imm() argument
2406 const void *Decoder) { in DecodeRegListOperand() argument
2434 const void *Decoder) { in DecodeRegListOperand16() argument
2458 const void *Decoder) { in DecodeMovePOperands() argument
2460 if (DecodeMovePRegPair(Inst, RegPair, Address, Decoder) == in DecodeMovePOperands()
2465 if (static_cast<const MipsDisassembler*>(Decoder)->hasMips32r6()) in DecodeMovePOperands()
2470 if (DecodeGPRMM16MovePRegisterClass(Inst, RegRs, Address, Decoder) == in DecodeMovePOperands()
2475 if (DecodeGPRMM16MovePRegisterClass(Inst, RegRt, Address, Decoder) == in DecodeMovePOperands()
2483 uint64_t Address, const void *Decoder) { in DecodeMovePRegPair() argument
2525 uint64_t Address, const void *Decoder) { in DecodeSimm23Lsl2() argument
2533 const void *Decoder) { in DecodeBgtzGroupBranchMMR6() argument
2568 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rs))); in DecodeBgtzGroupBranchMMR6()
2572 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt))); in DecodeBgtzGroupBranchMMR6()
2582 const void *Decoder) { in DecodeBlezGroupBranchMMR6() argument
2613 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rs))); in DecodeBlezGroupBranchMMR6()
2615 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt))); in DecodeBlezGroupBranchMMR6()