Lines Matching refs:assert
119 assert(MCOp.isExpr()); in getMachineOpValue()
128 assert(isa<LanaiMCExpr>(Expr) || Expr->getKind() == MCExpr::SymbolRef); in getMachineOpValue()
151 assert(Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg() && in adjustPqBits()
194 assert(Op1.isReg() && "First operand is not register."); in getRiMemoryOpValue()
195 assert((Op2.isImm() || Op2.isExpr()) && in getRiMemoryOpValue()
197 assert((LPAC::getAluOp(AluOp.getImm()) == LPAC::ADD) && in getRiMemoryOpValue()
202 assert(isInt<16>(Op2.getImm()) && in getRiMemoryOpValue()
226 assert(Op1.isReg() && "First operand is not register."); in getRrMemoryOpValue()
228 assert(Op2.isReg() && "Second operand is not register."); in getRrMemoryOpValue()
231 assert(AluMCOp.isImm() && "Third operator is not immediate."); in getRrMemoryOpValue()
265 assert(Op1.isReg() && "First operand is not register."); in getSplsOpValue()
266 assert((Op2.isImm() || Op2.isExpr()) && in getSplsOpValue()
268 assert((LPAC::getAluOp(AluOp.getImm()) == LPAC::ADD) && in getSplsOpValue()
273 assert(isInt<10>(Op2.getImm()) && in getSplsOpValue()