Lines Matching refs:RegisterRef
98 RegisterRef PhysicalRegisterInfo::normalize(RegisterRef RR) const { in normalize()
116 if (MI != Reg && aliasMM(RegisterRef(Reg), RegisterRef(MI))) in getAliasSet()
126 if (aliasRM(RegisterRef(Reg), RegisterRef(MI))) in getAliasSet()
132 bool PhysicalRegisterInfo::aliasRR(RegisterRef RA, RegisterRef RB) const { in aliasRR()
163 bool PhysicalRegisterInfo::aliasRM(RegisterRef RR, RegisterRef RM) const { in aliasRM()
198 bool PhysicalRegisterInfo::aliasMM(RegisterRef RM, RegisterRef RN) const { in aliasMM()
226 RegisterRef PhysicalRegisterInfo::mapTo(RegisterRef RR, unsigned R) const { in mapTo()
230 return RegisterRef(R, TRI.composeSubRegIndexLaneMask(Idx, RR.Mask)); in mapTo()
236 return RegisterRef(R, M & RCM); in mapTo()
241 bool RegisterAggr::hasAliasOf(RegisterRef RR) const { in hasAliasOf()
254 bool RegisterAggr::hasCoverOf(RegisterRef RR) const { in hasCoverOf()
269 RegisterAggr &RegisterAggr::insert(RegisterRef RR) { in insert()
288 RegisterAggr &RegisterAggr::intersect(RegisterRef RR) { in intersect()
297 RegisterAggr &RegisterAggr::clear(RegisterRef RR) { in clear()
306 RegisterRef RegisterAggr::intersectWith(RegisterRef RR) const { in intersectWith()
310 return RegisterRef(); in intersectWith()
311 RegisterRef NR = T.makeRegRef(); in intersectWith()
316 RegisterRef RegisterAggr::clearIn(RegisterRef RR) const { in clearIn()
320 RegisterRef RegisterAggr::makeRegRef() const { in makeRegRef()
323 return RegisterRef(); in makeRegRef()
354 return RegisterRef(); in makeRegRef()
362 return RegisterRef(F, M); in makeRegRef()
376 RegisterRef R = RG.PRI.getRefForUnit(U); in rr_iterator()