Lines Matching refs:PR
187 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeHexagonTarget() local
188 initializeHexagonBitSimplifyPass(PR); in LLVMInitializeHexagonTarget()
189 initializeHexagonConstExtendersPass(PR); in LLVMInitializeHexagonTarget()
190 initializeHexagonConstPropagationPass(PR); in LLVMInitializeHexagonTarget()
191 initializeHexagonEarlyIfConversionPass(PR); in LLVMInitializeHexagonTarget()
192 initializeHexagonGenMuxPass(PR); in LLVMInitializeHexagonTarget()
193 initializeHexagonHardwareLoopsPass(PR); in LLVMInitializeHexagonTarget()
194 initializeHexagonLoopIdiomRecognizePass(PR); in LLVMInitializeHexagonTarget()
195 initializeHexagonVectorLoopCarriedReusePass(PR); in LLVMInitializeHexagonTarget()
196 initializeHexagonNewValueJumpPass(PR); in LLVMInitializeHexagonTarget()
197 initializeHexagonOptAddrModePass(PR); in LLVMInitializeHexagonTarget()
198 initializeHexagonPacketizerPass(PR); in LLVMInitializeHexagonTarget()
199 initializeHexagonRDFOptPass(PR); in LLVMInitializeHexagonTarget()
200 initializeHexagonSplitDoubleRegsPass(PR); in LLVMInitializeHexagonTarget()
201 initializeHexagonVExtractPass(PR); in LLVMInitializeHexagonTarget()