260         if (&MO == &Op || !MO.isReg() || MO.getSubReg())  in partitionRegisters()
322         if (!Op.getSubReg())  in profit()
326       if (MI->getOperand(1).getSubReg() != 0)  in profit()
445             if (Op.getSubReg())  in isProfitable()
608     unsigned SR = Op.getSubReg();  in createHalfInstr()
654              .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg())  in splitMemRef()
657               .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg())  in splitMemRef()
663              .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg())  in splitMemRef()
667               .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg())  in splitMemRef()
679     assert(!UpdOp.getSubReg() && "Def operand with subreg");  in splitMemRef()
746       .addReg(Op1.getReg(), getRegState(Op1), Op1.getSubReg());  in splitCombine()
754       .addReg(Op2.getReg(), getRegState(Op2), Op2.getSubReg());  in splitCombine()
772     .addReg(Op1.getReg(), RS & ~RegState::Kill, Op1.getSubReg());  in splitExt()
774     .addReg(Op1.getReg(), RS, Op1.getSubReg())  in splitExt()
1081     if (!Op.isReg() || !Op.isUse() || !Op.getSubReg())  in replaceSubregUses()
1088     switch (Op.getSubReg()) {  in replaceSubregUses()
1111     if (MRI->getRegClass(R) != DoubleRC || Op.getSubReg())  in collapseRegPairs()