Lines Matching refs:RegisterRef
211 static bool getSubregMask(const BitTracker::RegisterRef &RR,
218 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH,
227 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI);
228 static bool isTransparentCopy(const BitTracker::RegisterRef &RD,
229 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI);
408 bool HexagonBitSimplify::getSubregMask(const BitTracker::RegisterRef &RR, in getSubregMask()
436 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH, in parseRegSequence()
899 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI) { in getFinalVRegClass()
929 bool HexagonBitSimplify::isTransparentCopy(const BitTracker::RegisterRef &RD, in isTransparentCopy()
930 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI) { in isTransparentCopy()
1069 bool usedBitsEqual(BitTracker::RegisterRef RD, BitTracker::RegisterRef RS);
1218 BitTracker::RegisterRef UR = *I; in computeUsedBits()
1263 BitTracker::RegisterRef RR = MI.getOperand(OpN); in computeUsedBits()
1280 bool RedundantInstrElimination::usedBitsEqual(BitTracker::RegisterRef RD, in usedBitsEqual()
1281 BitTracker::RegisterRef RS) { in usedBitsEqual()
1322 BitTracker::RegisterRef RD = MI->getOperand(0); in processBlock()
1332 BitTracker::RegisterRef RS = Op; in processBlock()
1507 bool findMatch(const BitTracker::RegisterRef &Inp,
1508 BitTracker::RegisterRef &Out, const RegisterSet &AVs);
1539 bool CopyGeneration::findMatch(const BitTracker::RegisterRef &Inp, in findMatch()
1540 BitTracker::RegisterRef &Out, const RegisterSet &AVs) { in findMatch()
1609 BitTracker::RegisterRef MR; in processBlock()
1616 BT.put(BitTracker::RegisterRef(NewR), BT.get(MR)); in processBlock()
1627 BitTracker::RegisterRef TL = { R, SubLo }; in processBlock()
1628 BitTracker::RegisterRef TH = { R, SubHi }; in processBlock()
1629 BitTracker::RegisterRef ML, MH; in processBlock()
1638 BT.put(BitTracker::RegisterRef(NewR), BT.get(R)); in processBlock()
1670 BitTracker::RegisterRef RD = MI.getOperand(0); in propagateRegCopy()
1677 BitTracker::RegisterRef RS = MI.getOperand(1); in propagateRegCopy()
1687 BitTracker::RegisterRef SL, SH; in propagateRegCopy()
1702 BitTracker::RegisterRef RH = MI.getOperand(1), RL = MI.getOperand(2); in propagateRegCopy()
1712 BitTracker::RegisterRef RS = MI.getOperand(SrcX); in propagateRegCopy()
1752 struct RegHalf : public BitTracker::RegisterRef {
1758 bool validateReg(BitTracker::RegisterRef R, unsigned Opc, unsigned OpNum);
1761 BitTracker::RegisterRef &Rs, BitTracker::RegisterRef &Rt);
1766 bool genPackhl(MachineInstr *MI, BitTracker::RegisterRef RD,
1768 bool genExtractHalf(MachineInstr *MI, BitTracker::RegisterRef RD,
1770 bool genCombineHalf(MachineInstr *MI, BitTracker::RegisterRef RD,
1772 bool genExtractLow(MachineInstr *MI, BitTracker::RegisterRef RD,
1774 bool genBitSplit(MachineInstr *MI, BitTracker::RegisterRef RD,
1776 bool simplifyTstbit(MachineInstr *MI, BitTracker::RegisterRef RD,
1778 bool simplifyExtractLow(MachineInstr *MI, BitTracker::RegisterRef RD,
1780 bool simplifyRCmp0(MachineInstr *MI, BitTracker::RegisterRef RD);
1877 bool BitSimplification::validateReg(BitTracker::RegisterRef R, unsigned Opc, in validateReg()
1887 const BitTracker::RegisterCell &RC, BitTracker::RegisterRef &Rs, in matchPackhl()
1888 BitTracker::RegisterRef &Rt) { in matchPackhl()
1923 BitTracker::RegisterRef RS = ValOp; in genStoreUpperHalf()
1968 BitTracker::RegisterRef RS = MI->getOperand(2); in genStoreImmediate()
2017 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genPackhl()
2021 BitTracker::RegisterRef Rs, Rt; in genPackhl()
2037 BT.put(BitTracker::RegisterRef(NewR), RC); in genPackhl()
2044 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genExtractHalf()
2076 BT.put(BitTracker::RegisterRef(NewR), RC); in genExtractHalf()
2083 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genCombineHalf()
2108 BT.put(BitTracker::RegisterRef(NewR), RC); in genCombineHalf()
2115 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genExtractLow()
2146 BitTracker::RegisterRef RS = Op; in genExtractLow()
2168 BT.put(BitTracker::RegisterRef(NewR), RC); in genExtractLow()
2175 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC, in genBitSplit()
2328 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in simplifyTstbit()
2334 BitTracker::RegisterRef RS = MI->getOperand(1); in simplifyTstbit()
2351 BitTracker::RegisterRef RR(V.RefI.Reg, 0); in simplifyTstbit()
2388 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC, in simplifyExtractLow()
2571 BT.put(BitTracker::RegisterRef(NewR), RC); in simplifyExtractLow()
2580 BitTracker::RegisterRef RD) { in simplifyRCmp0()
2600 BitTracker::RegisterRef SR = MI->getOperand(1); in simplifyRCmp0()
2626 BT.put(BitTracker::RegisterRef(NewR), NewRC); in simplifyRCmp0()
2692 BT.put(BitTracker::RegisterRef(NewR), NewRC); in simplifyRCmp0()
2729 BitTracker::RegisterRef RD = Op0; in processBlock()
2916 BitTracker::RegisterRef Inp, Out;
2923 BitTracker::RegisterRef LR, PR; // Loop Register, Preheader Register