83   for (auto VT : { MVT::i32, MVT::i64 }) {  in BPFTargetLowering()
84     if (VT == MVT::i32 && !STI.getHasAlu32())  in BPFTargetLowering()
87     setOperationAction(ISD::SDIVREM, VT, Expand);  in BPFTargetLowering()
88     setOperationAction(ISD::UDIVREM, VT, Expand);  in BPFTargetLowering()
89     setOperationAction(ISD::SREM, VT, Expand);  in BPFTargetLowering()
90     setOperationAction(ISD::UREM, VT, Expand);  in BPFTargetLowering()
91     setOperationAction(ISD::MULHU, VT, Expand);  in BPFTargetLowering()
92     setOperationAction(ISD::MULHS, VT, Expand);  in BPFTargetLowering()
93     setOperationAction(ISD::UMUL_LOHI, VT, Expand);  in BPFTargetLowering()
94     setOperationAction(ISD::SMUL_LOHI, VT, Expand);  in BPFTargetLowering()
95     setOperationAction(ISD::ROTR, VT, Expand);  in BPFTargetLowering()
96     setOperationAction(ISD::ROTL, VT, Expand);  in BPFTargetLowering()
97     setOperationAction(ISD::SHL_PARTS, VT, Expand);  in BPFTargetLowering()
98     setOperationAction(ISD::SRL_PARTS, VT, Expand);  in BPFTargetLowering()
99     setOperationAction(ISD::SRA_PARTS, VT, Expand);  in BPFTargetLowering()
100     setOperationAction(ISD::CTPOP, VT, Expand);  in BPFTargetLowering()
102     setOperationAction(ISD::SETCC, VT, Expand);  in BPFTargetLowering()
103     setOperationAction(ISD::SELECT, VT, Expand);  in BPFTargetLowering()
104     setOperationAction(ISD::SELECT_CC, VT, Custom);  in BPFTargetLowering()
123   for (MVT VT : MVT::integer_valuetypes()) {  in BPFTargetLowering()  local
124     setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);  in BPFTargetLowering()
125     setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote);  in BPFTargetLowering()
126     setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);  in BPFTargetLowering()
128     setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand);  in BPFTargetLowering()
129     setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand);  in BPFTargetLowering()
130     setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand);  in BPFTargetLowering()
176                                                 MVT VT) const {  in getRegForInlineAsmConstraint()
186   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);  in getRegForInlineAsmConstraint()
467       InVals.push_back(DAG.getConstant(0, DL, Ins[i].VT));  in LowerCallResult()
468     return DAG.getCopyFromReg(Chain, DL, 1, Ins[0].VT, InFlag).getValue(1);  in LowerCallResult()
768                                           EVT VT) const {  in getSetCCResultType()
773                                               EVT VT) const {  in getScalarShiftAmountTy()
774   return (getHasAlu32() && VT == MVT::i32) ? MVT::i32 : MVT::i64;  in getScalarShiftAmountTy()