Lines Matching refs:Cond
267 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
307 Cond.clear(); in analyzeBranch()
331 if (Cond.empty()) { in analyzeBranch()
372 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
378 assert(Cond.size() == 1); in analyzeBranch()
387 AVRCC::CondCodes OldBranchCode = (AVRCC::CondCodes)Cond[0].getImm(); in analyzeBranch()
402 ArrayRef<MachineOperand> Cond, in insertBranch() argument
409 assert((Cond.size() == 1 || Cond.size() == 0) && in insertBranch()
412 if (Cond.empty()) { in insertBranch()
422 AVRCC::CondCodes CC = (AVRCC::CondCodes)Cond[0].getImm(); in insertBranch()
468 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
469 assert(Cond.size() == 1 && "Invalid AVR branch condition!"); in reverseBranchCondition()
471 AVRCC::CondCodes CC = static_cast<AVRCC::CondCodes>(Cond[0].getImm()); in reverseBranchCondition()
472 Cond[0].setImm(getOppositeCondition(CC)); in reverseBranchCondition()