361                                           unsigned FrameReg, int &Offset,  in rewriteFrameIndex()  argument
377     emitThumbRegPlusImmediate(MBB, II, dl, DestReg, FrameReg, Offset, TII,  in rewriteFrameIndex()
387     unsigned NumBits = (FrameReg == ARM::SP) ? 8 : 5;  in rewriteFrameIndex()
400       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);  in rewriteFrameIndex()
406       if (NewOpc != Opcode && FrameReg != ARM::SP)  in rewriteFrameIndex()
523   unsigned FrameReg;  in eliminateFrameIndex()  local
526   int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj);  in eliminateFrameIndex()
533   if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){  in eliminateFrameIndex()
545     MI.getOperand(FIOperandNum).  ChangeToRegister(FrameReg, false /*isDef*/);  in eliminateFrameIndex()
553   if (rewriteFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))  in eliminateFrameIndex()
573       if (FrameReg == ARM::SP || STI.genExecuteOnly())  in eliminateFrameIndex()
574         emitThumbRegPlusImmInReg(MBB, II, dl, TmpReg, FrameReg,  in eliminateFrameIndex()
581       emitThumbRegPlusImmediate(MBB, II, dl, TmpReg, FrameReg, Offset, TII,  in eliminateFrameIndex()
590       MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false,  in eliminateFrameIndex()
597         if (FrameReg == ARM::SP || STI.genExecuteOnly())  in eliminateFrameIndex()
598           emitThumbRegPlusImmInReg(MBB, II, dl, VReg, FrameReg,  in eliminateFrameIndex()
605         emitThumbRegPlusImmediate(MBB, II, dl, VReg, FrameReg, Offset, TII,  in eliminateFrameIndex()
612         MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false,  in eliminateFrameIndex()