Lines Matching refs:getOperand
88 const MCOperand &Dst = MI->getOperand(0); in printInst()
89 const MCOperand &MO1 = MI->getOperand(1); in printInst()
90 const MCOperand &MO2 = MI->getOperand(2); in printInst()
91 const MCOperand &MO3 = MI->getOperand(3); in printInst()
111 const MCOperand &Dst = MI->getOperand(0); in printInst()
112 const MCOperand &MO1 = MI->getOperand(1); in printInst()
113 const MCOperand &MO2 = MI->getOperand(2); in printInst()
138 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
152 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
153 MI->getOperand(3).getImm() == -4) { in printInst()
157 printRegName(O, MI->getOperand(1).getReg()); in printInst()
167 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
181 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
182 MI->getOperand(4).getImm() == 4) { in printInst()
186 printRegName(O, MI->getOperand(0).getReg()); in printInst()
196 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
209 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
221 unsigned BaseReg = MI->getOperand(0).getReg(); in printInst()
223 if (MI->getOperand(i).getReg() == BaseReg) in printInst()
252 unsigned Reg = MI->getOperand(isStore ? 1 : 0).getReg(); in printInst()
259 NewMI.addOperand(MI->getOperand(0)); in printInst()
266 NewMI.addOperand(MI->getOperand(i)); in printInst()
277 switch (MI->getOperand(0).getImm()) { in printInst()
301 const MCOperand &Op = MI->getOperand(OpNo); in printOperand()
342 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand()
372 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand()
373 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegRegOperand()
374 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printSORegRegOperand()
392 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegImmOperand()
393 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegImmOperand()
409 const MCOperand &MO1 = MI->getOperand(Op); in printAM2PreOrOffsetIndexOp()
410 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM2PreOrOffsetIndexOp()
411 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAM2PreOrOffsetIndexOp()
438 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBB()
439 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBB()
450 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBH()
451 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBH()
462 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode2Operand()
470 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAddrMode2Operand()
482 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode2OffsetOperand()
483 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode2OffsetOperand()
507 const MCOperand &MO1 = MI->getOperand(Op); in printAM3PreOrOffsetIndexOp()
508 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM3PreOrOffsetIndexOp()
509 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAM3PreOrOffsetIndexOp()
536 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode3Operand()
542 assert(ARM_AM::getAM3IdxMode(MI->getOperand(Op + 2).getImm()) != in printAddrMode3Operand()
552 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode3OffsetOperand()
553 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode3OffsetOperand()
570 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8Operand()
579 const MCOperand &MO1 = MI->getOperand(OpNum); in printPostIdxRegOperand()
580 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printPostIdxRegOperand()
589 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8s4Operand()
599 ARM_AM::getAM4SubMode(MI->getOperand(OpNum).getImm()); in printLdStmModeOperand()
607 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5Operand()
608 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode5Operand()
631 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5FP16Operand()
632 const MCOperand &MO2 = MI->getOperand(OpNum+1); in printAddrMode5FP16Operand()
658 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode6Operand()
659 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode6Operand()
672 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode7Operand()
682 const MCOperand &MO = MI->getOperand(OpNum); in printAddrMode6OffsetOperand()
695 const MCOperand &MO = MI->getOperand(OpNum); in printBitfieldInvMaskImmOperand()
707 unsigned val = MI->getOperand(OpNum).getImm(); in printMemBOption()
714 unsigned val = MI->getOperand(OpNum).getImm(); in printInstSyncBOption()
721 unsigned val = MI->getOperand(OpNum).getImm(); in printTraceSyncBOption()
728 unsigned ShiftOp = MI->getOperand(OpNum).getImm(); in printShiftImmOperand()
742 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHLSLShiftImm()
752 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHASRShiftImm()
773 printRegName(O, MI->getOperand(i).getReg()); in printRegisterList()
781 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPRPairOperand()
790 const MCOperand &Op = MI->getOperand(OpNum); in printSetendOperand()
799 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIMod()
805 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIFlag()
818 const MCOperand &Op = MI->getOperand(OpNum); in printMSRMaskOperand()
900 uint32_t Banked = MI->getOperand(OpNum).getImm(); in printBankedRegOperand()
914 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printPredicateOperand()
926 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printMandatoryPredicateOperand()
933 if (MI->getOperand(OpNum).getReg()) { in printSBitModifierOperand()
934 assert(MI->getOperand(OpNum).getReg() == ARM::CPSR && in printSBitModifierOperand()
943 O << MI->getOperand(OpNum).getImm(); in printNoHashImmediate()
949 O << "p" << MI->getOperand(OpNum).getImm(); in printPImmediate()
955 O << "c" << MI->getOperand(OpNum).getImm(); in printCImmediate()
961 O << "{" << MI->getOperand(OpNum).getImm() << "}"; in printCoprocOptionImm()
973 const MCOperand &MO = MI->getOperand(OpNum); in printAdrLabelOperand()
995 O << markup("<imm:") << "#" << formatImm(MI->getOperand(OpNum).getImm() * 4) in printThumbS4ImmOperand()
1002 unsigned Imm = MI->getOperand(OpNum).getImm(); in printThumbSRImm()
1011 unsigned Mask = MI->getOperand(OpNum).getImm(); in printThumbITMask()
1012 unsigned Firstcond = MI->getOperand(OpNum - 1).getImm(); in printThumbITMask()
1028 const MCOperand &MO1 = MI->getOperand(Op); in printThumbAddrModeRROperand()
1029 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeRROperand()
1050 const MCOperand &MO1 = MI->getOperand(Op); in printThumbAddrModeImm5SOperand()
1051 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeImm5SOperand()
1101 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2SOOperand()
1102 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2SOOperand()
1117 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrModeImm12Operand()
1118 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrModeImm12Operand()
1146 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8Operand()
1147 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8Operand()
1170 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4Operand()
1171 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8s4Operand()
1200 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm0_1020s4Operand()
1201 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm0_1020s4Operand()
1215 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8OffsetOperand()
1230 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4OffsetOperand()
1249 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeSoRegOperand()
1250 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeSoRegOperand()
1251 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printT2AddrModeSoRegOperand()
1271 const MCOperand &MO = MI->getOperand(OpNum); in printFPImmOperand()
1279 unsigned EncodedImm = MI->getOperand(OpNum).getImm(); in printNEONModImmOperand()
1290 unsigned Imm = MI->getOperand(OpNum).getImm(); in printImmPlusOneOperand()
1297 unsigned Imm = MI->getOperand(OpNum).getImm(); in printRotImmOperand()
1307 MCOperand Op = MI->getOperand(OpNum); in printModImmOperand()
1320 PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC); in printModImmOperand()
1347 O << markup("<imm:") << "#" << 16 - MI->getOperand(OpNum).getImm() in printFBits16()
1353 O << markup("<imm:") << "#" << 32 - MI->getOperand(OpNum).getImm() in printFBits32()
1360 O << "[" << MI->getOperand(OpNum).getImm() << "]"; in printVectorIndex()
1367 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOne()
1374 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwo()
1387 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpaced()
1404 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThree()
1406 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThree()
1408 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThree()
1419 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFour()
1421 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFour()
1423 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFour()
1425 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFour()
1434 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOneAllLanes()
1442 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoAllLanes()
1460 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeAllLanes()
1462 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThreeAllLanes()
1464 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeAllLanes()
1476 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourAllLanes()
1478 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFourAllLanes()
1480 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourAllLanes()
1482 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFourAllLanes()
1489 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpacedAllLanes()
1506 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpacedAllLanes()
1508 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpacedAllLanes()
1510 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpacedAllLanes()
1521 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpacedAllLanes()
1523 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpacedAllLanes()
1525 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpacedAllLanes()
1527 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpacedAllLanes()
1539 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpaced()
1541 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpaced()
1543 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpaced()
1554 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpaced()
1556 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpaced()
1558 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpaced()
1560 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpaced()
1568 unsigned Val = MI->getOperand(OpNo).getImm(); in printComplexRotationOp()