5002   Inst.addOperand(Inst.getOperand(0));  in cvtThumbMultiply()
6317     unsigned OpReg = Inst.getOperand(i).getReg();  in checkLowRegisterList()
6331     unsigned OpReg = Inst.getOperand(i).getReg();  in listContainsReg()
6391   unsigned Rt = MRI->getEncodingValue(Inst.getOperand(RtIndex).getReg());  in validateLDRDSTRD()
6392   unsigned Rt2 = MRI->getEncodingValue(Inst.getOperand(RtIndex + 1).getReg());  in validateLDRDSTRD()
6426     unsigned Rn = MRI->getEncodingValue(Inst.getOperand(3).getReg());  in validateLDRDSTRD()
6460         Inst.getOperand(MCID.findFirstPredOperandIdx()).getImm());  in validateInstruction()
6474              Inst.getOperand(MCID.findFirstPredOperandIdx()).getImm() !=  in validateInstruction()
6479              Inst.getOperand(MCID.findFirstPredOperandIdx()).getImm() !=  in validateInstruction()
6496     unsigned Cond = Inst.getOperand(0).getImm();  in validateInstruction()
6497     unsigned Mask = Inst.getOperand(1).getImm();  in validateInstruction()
6530     const unsigned RmReg = Inst.getOperand(0).getReg();  in validateInstruction()
6571     const unsigned Rt = MRI->getEncodingValue(Inst.getOperand(1).getReg());  in validateInstruction()
6572     const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg());  in validateInstruction()
6604     const unsigned Rt = MRI->getEncodingValue(Inst.getOperand(0).getReg());  in validateInstruction()
6605     const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg());  in validateInstruction()
6617     unsigned LSB = Inst.getOperand(2).getImm();  in validateInstruction()
6618     unsigned Widthm1 = Inst.getOperand(3).getImm();  in validateInstruction()
6632     unsigned Rn = Inst.getOperand(0).getReg();  in validateInstruction()
6663     if (listContainsReg(Inst, 3, Inst.getOperand(0).getReg()))  in validateInstruction()
6681     if (listContainsReg(Inst, 3, Inst.getOperand(0).getReg()))  in validateInstruction()
6752     InvalidLowList = checkLowRegisterList(Inst, 4, Inst.getOperand(0).getReg(),  in validateInstruction()
6773         Inst.getOperand(0).getReg() != Inst.getOperand(2).getReg()) {  in validateInstruction()
6834     unsigned Imm8 = Inst.getOperand(0).getImm();  in validateInstruction()
6835     unsigned Pred = Inst.getOperand(1).getImm();  in validateInstruction()
6854     unsigned Option = Inst.getOperand(0).getImm();  in validateInstruction()
6855     unsigned Pred = Inst.getOperand(1).getImm();  in validateInstruction()
6870     const unsigned Sm = MRI->getEncodingValue(Inst.getOperand(2).getReg());  in validateInstruction()
6871     const unsigned Sm1 = MRI->getEncodingValue(Inst.getOperand(3).getReg());  in validateInstruction()
6879     const unsigned Sm = MRI->getEncodingValue(Inst.getOperand(0).getReg());  in validateInstruction()
6880     const unsigned Sm1 = MRI->getEncodingValue(Inst.getOperand(1).getReg());  in validateInstruction()
7179     TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
7180     TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
7181     TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
7184     TmpInst.addOperand(Inst.getOperand(2));  in processInstruction()
7185     TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
7197     TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
7198     TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
7199     TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
7202     TmpInst.addOperand(Inst.getOperand(2));  in processInstruction()
7203     TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
7209     if (Inst.getOperand(1).getReg() != ARM::PC ||  in processInstruction()
7210         Inst.getOperand(5).getReg() != 0 ||  in processInstruction()
7211         !(Inst.getOperand(2).isExpr() || Inst.getOperand(2).isImm()))  in processInstruction()
7215     TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
7216     if (Inst.getOperand(2).isImm()) {  in processInstruction()
7219       unsigned Enc = Inst.getOperand(2).getImm();  in processInstruction()
7228       const MCExpr *OpExpr = Inst.getOperand(2).getExpr();  in processInstruction()
7239     TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
7240     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
7247     if (Inst.getOperand(1).getImm() > 0 &&  in processInstruction()
7248         Inst.getOperand(1).getImm() <= 0xff &&  in processInstruction()
7286         Inst.getOperand(0).getReg() != ARM::PC &&  in processInstruction()
7287         Inst.getOperand(0).getReg() != ARM::SP) {  in processInstruction()
7329         TmpInst.addOperand(Inst.getOperand(0));           // Rt  in processInstruction()
7331         TmpInst.addOperand(Inst.getOperand(2));           // CondCode  in processInstruction()
7332         TmpInst.addOperand(Inst.getOperand(3));           // CondCode  in processInstruction()
7343     TmpInst.addOperand(Inst.getOperand(0));           // Rt  in processInstruction()
7347     TmpInst.addOperand(Inst.getOperand(2));           // CondCode  in processInstruction()
7348     TmpInst.addOperand(Inst.getOperand(3));           // CondCode  in processInstruction()
7361     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7362     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7363     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7364     TmpInst.addOperand(Inst.getOperand(4)); // Rm  in processInstruction()
7365     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7366     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7367     TmpInst.addOperand(Inst.getOperand(5)); // CondCode  in processInstruction()
7368     TmpInst.addOperand(Inst.getOperand(6));  in processInstruction()
7383     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7384     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7385     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7386     TmpInst.addOperand(Inst.getOperand(4)); // Rm  in processInstruction()
7387     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7388     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7390     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7391     TmpInst.addOperand(Inst.getOperand(5)); // CondCode  in processInstruction()
7392     TmpInst.addOperand(Inst.getOperand(6));  in processInstruction()
7407     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7408     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7409     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7410     TmpInst.addOperand(Inst.getOperand(4)); // Rm  in processInstruction()
7411     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7412     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7414     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7416     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7417     TmpInst.addOperand(Inst.getOperand(5)); // CondCode  in processInstruction()
7418     TmpInst.addOperand(Inst.getOperand(6));  in processInstruction()
7433     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7434     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7435     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7436     TmpInst.addOperand(Inst.getOperand(4)); // Rm  in processInstruction()
7437     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7438     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7440     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7442     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7444     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7445     TmpInst.addOperand(Inst.getOperand(5)); // CondCode  in processInstruction()
7446     TmpInst.addOperand(Inst.getOperand(6));  in processInstruction()
7459     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7460     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7461     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7463     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7464     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7465     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7466     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7481     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7482     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7483     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7485     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7486     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7488     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7489     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7490     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7505     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7506     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7507     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7509     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7510     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7512     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7514     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7515     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7516     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7531     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7532     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7533     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7535     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7536     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7538     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7540     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7542     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7543     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7544     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7557     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7558     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7559     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7560     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7561     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7562     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7577     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7578     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7579     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7580     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7582     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7583     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7584     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7599     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7600     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7601     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7602     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7604     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7606     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7607     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7608     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7623     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7624     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7625     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7626     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7628     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7630     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7632     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7633     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7634     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7648     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7649     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7650     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7651     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7652     TmpInst.addOperand(Inst.getOperand(4)); // Rm  in processInstruction()
7653     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7654     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7655     TmpInst.addOperand(Inst.getOperand(5)); // CondCode  in processInstruction()
7656     TmpInst.addOperand(Inst.getOperand(6));  in processInstruction()
7671     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7672     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7674     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7675     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7676     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7677     TmpInst.addOperand(Inst.getOperand(4)); // Rm  in processInstruction()
7678     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7679     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7681     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7682     TmpInst.addOperand(Inst.getOperand(5)); // CondCode  in processInstruction()
7683     TmpInst.addOperand(Inst.getOperand(6));  in processInstruction()
7698     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7699     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7701     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7703     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7704     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7705     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7706     TmpInst.addOperand(Inst.getOperand(4)); // Rm  in processInstruction()
7707     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7708     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7710     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7712     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7713     TmpInst.addOperand(Inst.getOperand(5)); // CondCode  in processInstruction()
7714     TmpInst.addOperand(Inst.getOperand(6));  in processInstruction()
7729     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7730     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7732     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7734     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7736     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7737     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7738     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7739     TmpInst.addOperand(Inst.getOperand(4)); // Rm  in processInstruction()
7740     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7741     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7743     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7745     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7747     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7748     TmpInst.addOperand(Inst.getOperand(5)); // CondCode  in processInstruction()
7749     TmpInst.addOperand(Inst.getOperand(6));  in processInstruction()
7762     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7763     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7764     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7765     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7767     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7768     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7769     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7770     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7785     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7786     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7788     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7789     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7790     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7792     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7793     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7795     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7796     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7797     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7812     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7813     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7815     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7817     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7818     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7819     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7821     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7822     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7824     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7826     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7827     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7828     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7843     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7844     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7846     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7848     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7850     TmpInst.addOperand(Inst.getOperand(2)); // Rn_wb  in processInstruction()
7851     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7852     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7854     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7855     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7857     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7859     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7861     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7862     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7863     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7876     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7877     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7878     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7879     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7880     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7881     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7882     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7897     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7898     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7900     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7901     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7902     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7903     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7905     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7906     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7907     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7922     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7923     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7925     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7927     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7928     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7929     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7930     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7932     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7934     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7935     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7936     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7951     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7952     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7954     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7956     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7958     TmpInst.addOperand(Inst.getOperand(2)); // Rn  in processInstruction()
7959     TmpInst.addOperand(Inst.getOperand(3)); // alignment  in processInstruction()
7960     TmpInst.addOperand(Inst.getOperand(0)); // Tied operand src (== Vd)  in processInstruction()
7961     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7963     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7965     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7967     TmpInst.addOperand(Inst.getOperand(1)); // lane  in processInstruction()
7968     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
7969     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
7984     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
7985     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7987     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
7989     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
7990     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
7991     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
7992     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8006     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8007     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8009     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8011     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8012     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8013     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8015     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8016     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8030     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8031     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8033     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8035     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8036     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8037     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8038     TmpInst.addOperand(Inst.getOperand(3)); // Rm  in processInstruction()
8039     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
8040     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
8055     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8056     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8058     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8060     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8061     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8062     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8063     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8077     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8078     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8080     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8082     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8083     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8084     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8086     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8087     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8101     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8102     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8104     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8106     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8107     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8108     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8109     TmpInst.addOperand(Inst.getOperand(3)); // Rm  in processInstruction()
8110     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
8111     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
8126     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8127     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8129     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8131     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8133     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8134     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8135     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8136     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8150     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8151     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8153     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8155     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8157     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8158     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8159     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8161     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8162     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8176     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8177     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8179     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8181     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8183     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8184     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8185     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8186     TmpInst.addOperand(Inst.getOperand(3)); // Rm  in processInstruction()
8187     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
8188     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
8203     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8204     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8206     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8208     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8210     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8211     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8212     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8213     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8227     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8228     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8230     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8232     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8234     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8235     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8236     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8238     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8239     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8253     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8254     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8256     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8258     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8260     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8261     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8262     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8263     TmpInst.addOperand(Inst.getOperand(3)); // Rm  in processInstruction()
8264     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
8265     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
8280     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8281     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8282     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8283     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8285     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8287     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8288     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8302     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8303     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8304     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8306     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8307     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8309     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8311     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8312     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8326     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8327     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8328     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8329     TmpInst.addOperand(Inst.getOperand(3)); // Rm  in processInstruction()
8330     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8331     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8333     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8335     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
8336     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
8351     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8352     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8353     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8354     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8356     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8358     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8360     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8361     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8375     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8376     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8377     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8379     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8380     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8382     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8384     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8386     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8387     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8401     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8402     TmpInst.addOperand(Inst.getOperand(1)); // Rn_wb == tied Rn  in processInstruction()
8403     TmpInst.addOperand(Inst.getOperand(2)); // alignment  in processInstruction()
8404     TmpInst.addOperand(Inst.getOperand(3)); // Rm  in processInstruction()
8405     TmpInst.addOperand(Inst.getOperand(0)); // Vd  in processInstruction()
8406     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8408     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8410     TmpInst.addOperand(MCOperand::createReg(Inst.getOperand(0).getReg() +  in processInstruction()
8412     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
8413     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
8422     if (isARMLowRegister(Inst.getOperand(0).getReg()) &&  in processInstruction()
8423         isARMLowRegister(Inst.getOperand(1).getReg()) &&  in processInstruction()
8424         Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) &&  in processInstruction()
8436       TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
8437       TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
8438       TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
8439       TmpInst.addOperand(Inst.getOperand(2));  in processInstruction()
8440       TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8441       TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8454     if (isARMLowRegister(Inst.getOperand(0).getReg()) &&  in processInstruction()
8455         isARMLowRegister(Inst.getOperand(1).getReg()) &&  in processInstruction()
8456         isARMLowRegister(Inst.getOperand(2).getReg()) &&  in processInstruction()
8457         Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() &&  in processInstruction()
8463     switch(ARM_AM::getSORegShOp(Inst.getOperand(3).getImm())) {  in processInstruction()
8471     TmpInst.addOperand(Inst.getOperand(0)); // Rd  in processInstruction()
8475     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8476     TmpInst.addOperand(Inst.getOperand(2)); // Rm  in processInstruction()
8477     TmpInst.addOperand(Inst.getOperand(4)); // CondCode  in processInstruction()
8478     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
8491     if (isARMLowRegister(Inst.getOperand(0).getReg()) &&  in processInstruction()
8492         isARMLowRegister(Inst.getOperand(1).getReg()) &&  in processInstruction()
8498     unsigned Shift = ARM_AM::getSORegShOp(Inst.getOperand(2).getImm());  in processInstruction()
8499     unsigned Amount = ARM_AM::getSORegOffset(Inst.getOperand(2).getImm());  in processInstruction()
8524     TmpInst.addOperand(Inst.getOperand(0)); // Rd  in processInstruction()
8528     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8531     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8532     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8555     TmpInst.addOperand(Inst.getOperand(0)); // Rd  in processInstruction()
8556     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8557     TmpInst.addOperand(Inst.getOperand(2)); // Rm  in processInstruction()
8559     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8560     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8561     TmpInst.addOperand(Inst.getOperand(5)); // cc_out  in processInstruction()
8578     unsigned Amt = Inst.getOperand(2).getImm();  in processInstruction()
8586     TmpInst.addOperand(Inst.getOperand(0)); // Rd  in processInstruction()
8587     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8590     TmpInst.addOperand(Inst.getOperand(3)); // CondCode  in processInstruction()
8591     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8592     TmpInst.addOperand(Inst.getOperand(5)); // cc_out  in processInstruction()
8600     TmpInst.addOperand(Inst.getOperand(0)); // Rd  in processInstruction()
8601     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8603     TmpInst.addOperand(Inst.getOperand(2)); // CondCode  in processInstruction()
8604     TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8605     TmpInst.addOperand(Inst.getOperand(4)); // cc_out  in processInstruction()
8616     TmpInst.addOperand(Inst.getOperand(4)); // Rt  in processInstruction()
8617     TmpInst.addOperand(Inst.getOperand(0)); // Rn_wb  in processInstruction()
8618     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8620     TmpInst.addOperand(Inst.getOperand(2)); // CondCode  in processInstruction()
8621     TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8632     TmpInst.addOperand(Inst.getOperand(0)); // Rn_wb  in processInstruction()
8633     TmpInst.addOperand(Inst.getOperand(4)); // Rt  in processInstruction()
8634     TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8636     TmpInst.addOperand(Inst.getOperand(2)); // CondCode  in processInstruction()
8637     TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8648       TmpInst.addOperand(Inst.getOperand(4)); // Rt  in processInstruction()
8649       TmpInst.addOperand(Inst.getOperand(0)); // Rn_wb  in processInstruction()
8650       TmpInst.addOperand(Inst.getOperand(1)); // Rn  in processInstruction()
8653       TmpInst.addOperand(Inst.getOperand(2)); // CondCode  in processInstruction()
8654       TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8666       TmpInst.addOperand(Inst.getOperand(0)); // Rn_wb  in processInstruction()
8667       TmpInst.addOperand(Inst.getOperand(4)); // Rt  in processInstruction()
8668       TmpInst.addOperand(Inst.getOperand(1)); // addrmode_imm12  in processInstruction()
8670       TmpInst.addOperand(Inst.getOperand(2)); // CondCode  in processInstruction()
8671       TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8679         ARM_AM::getT2SOImmVal(Inst.getOperand(2).getImm()) == -1)  in processInstruction()
8688         ARM_AM::getT2SOImmVal(Inst.getOperand(2).getImm()) == -1)  in processInstruction()
8698     if ((unsigned)Inst.getOperand(3).getImm() < 8 && Operands.size() == 6) {  in processInstruction()
8708     if ((unsigned)Inst.getOperand(3).getImm() < 8 && Operands.size() == 6) {  in processInstruction()
8719     if (Inst.getOperand(0).getReg() != Inst.getOperand(1).getReg() ||  in processInstruction()
8720         !isARMLowRegister(Inst.getOperand(0).getReg()) ||  in processInstruction()
8721         (Inst.getOperand(2).isImm() &&  in processInstruction()
8722          (unsigned)Inst.getOperand(2).getImm() > 255) ||  in processInstruction()
8723         Inst.getOperand(5).getReg() != (inITBlock() ? 0 : ARM::CPSR) ||  in processInstruction()
8729     TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
8730     TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
8731     TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
8732     TmpInst.addOperand(Inst.getOperand(2));  in processInstruction()
8733     TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8734     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8745     auto DestReg = Inst.getOperand(0).getReg();  in processInstruction()
8746     bool Transform = DestReg == Inst.getOperand(1).getReg();  in processInstruction()
8747     if (!Transform && DestReg == Inst.getOperand(2).getReg()) {  in processInstruction()
8752         Inst.getOperand(5).getReg() != 0 ||  in processInstruction()
8757     TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
8758     TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
8759     TmpInst.addOperand(Inst.getOperand(Swap ? 1 : 2));  in processInstruction()
8760     TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8761     TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8768     if (Inst.getOperand(0).getReg() != Inst.getOperand(2).getReg()) {  in processInstruction()
8776     if (Inst.getOperand(1).getImm() != ARMCC::AL && !inITBlock()) {  in processInstruction()
8783     if (Inst.getOperand(1).getImm() != ARMCC::AL && !inITBlock()){  in processInstruction()
8790     if (Inst.getOperand(1).getImm() == ARMCC::AL || inITBlock()) {  in processInstruction()
8797     if (Inst.getOperand(1).getImm() == ARMCC::AL) {  in processInstruction()
8807     unsigned Rn = Inst.getOperand(0).getReg();  in processInstruction()
8822                     MCOperand::createReg(Inst.getOperand(0).getReg()));  in processInstruction()
8831     unsigned Rn = Inst.getOperand(0).getReg();  in processInstruction()
8869     if (isARMLowRegister(Inst.getOperand(0).getReg()) &&  in processInstruction()
8870         (Inst.getOperand(1).isImm() &&  in processInstruction()
8871          (unsigned)Inst.getOperand(1).getImm() <= 255) &&  in processInstruction()
8872         Inst.getOperand(4).getReg() == (inITBlock() ? 0 : ARM::CPSR) &&  in processInstruction()
8877       TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
8878       TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8879       TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
8880       TmpInst.addOperand(Inst.getOperand(2));  in processInstruction()
8881       TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8890     if (isARMLowRegister(Inst.getOperand(0).getReg()) &&  in processInstruction()
8891         isARMLowRegister(Inst.getOperand(1).getReg()) &&  in processInstruction()
8892         Inst.getOperand(2).getImm() == ARMCC::AL &&  in processInstruction()
8893         Inst.getOperand(4).getReg() == ARM::CPSR &&  in processInstruction()
8897       TmpInst.setOpcode(Inst.getOperand(4).getReg() ? ARM::tMOVSr : ARM::tMOVr);  in processInstruction()
8898       TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
8899       TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
8900       TmpInst.addOperand(Inst.getOperand(2));  in processInstruction()
8901       TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8913     if (isARMLowRegister(Inst.getOperand(0).getReg()) &&  in processInstruction()
8914         isARMLowRegister(Inst.getOperand(1).getReg()) &&  in processInstruction()
8915         Inst.getOperand(2).getImm() == 0 &&  in processInstruction()
8928       TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
8929       TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
8930       TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8931       TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8938     ARM_AM::ShiftOpc SOpc = ARM_AM::getSORegShOp(Inst.getOperand(2).getImm());  in processInstruction()
8942     if (ARM_AM::getSORegOffset(Inst.getOperand(2).getImm()) == 0) {  in processInstruction()
8946       TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
8947       TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
8948       TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
8949       TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8950       TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
8963     ARM_AM::ShiftOpc SOpc = ARM_AM::getSORegShOp(Inst.getOperand(3).getImm());  in processInstruction()
8976     if (ARM_AM::getSORegOffset(Inst.getOperand(3).getImm()) == 0 &&  in processInstruction()
8980       TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
8981       TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
8982       TmpInst.addOperand(Inst.getOperand(2));  in processInstruction()
8983       TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
8984       TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
8985       TmpInst.addOperand(Inst.getOperand(6));  in processInstruction()
8993     MCOperand &MO = Inst.getOperand(1);  in processInstruction()
8995     ARMCC::CondCodes Cond = ARMCC::CondCodes(Inst.getOperand(0).getImm());  in processInstruction()
9011     if ((isARMLowRegister(Inst.getOperand(1).getReg()) &&  in processInstruction()
9012          isARMLowRegister(Inst.getOperand(2).getReg())) &&  in processInstruction()
9013         Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() &&  in processInstruction()
9014         Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) &&  in processInstruction()
9028       TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
9029       TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
9030       TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
9031       TmpInst.addOperand(Inst.getOperand(2));  in processInstruction()
9032       TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
9033       TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
9046     if ((isARMLowRegister(Inst.getOperand(1).getReg()) &&  in processInstruction()
9047          isARMLowRegister(Inst.getOperand(2).getReg())) &&  in processInstruction()
9048         (Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() ||  in processInstruction()
9049          Inst.getOperand(0).getReg() == Inst.getOperand(2).getReg()) &&  in processInstruction()
9050         Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) &&  in processInstruction()
9062       TmpInst.addOperand(Inst.getOperand(0));  in processInstruction()
9063       TmpInst.addOperand(Inst.getOperand(5));  in processInstruction()
9064       if (Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg()) {  in processInstruction()
9065         TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
9066         TmpInst.addOperand(Inst.getOperand(2));  in processInstruction()
9068         TmpInst.addOperand(Inst.getOperand(2));  in processInstruction()
9069         TmpInst.addOperand(Inst.getOperand(1));  in processInstruction()
9071       TmpInst.addOperand(Inst.getOperand(3));  in processInstruction()
9072       TmpInst.addOperand(Inst.getOperand(4));  in processInstruction()
9098     if (isThumbOne() && Inst.getOperand(OpNo).getReg() != ARM::CPSR)  in checkTargetMatchPredicate()
9102     if (isThumbTwo() && Inst.getOperand(OpNo).getReg() != ARM::CPSR &&  in checkTargetMatchPredicate()
9105     if (isThumbTwo() && Inst.getOperand(OpNo).getReg() == ARM::CPSR &&  in checkTargetMatchPredicate()
9109     if (Opc == ARM::tLSLri && Inst.getOperand(3).getImm() == 0 && inITBlock())  in checkTargetMatchPredicate()
9115         isARMLowRegister(Inst.getOperand(1).getReg()) &&  in checkTargetMatchPredicate()
9116         isARMLowRegister(Inst.getOperand(2).getReg()))  in checkTargetMatchPredicate()
9120              isARMLowRegister(Inst.getOperand(0).getReg()) &&  in checkTargetMatchPredicate()
9121              isARMLowRegister(Inst.getOperand(1).getReg()))  in checkTargetMatchPredicate()
9131     if (Inst.getOperand(0).getReg() == ARM::SP &&  in checkTargetMatchPredicate()
9132         Inst.getOperand(1).getReg() == ARM::SP)  in checkTargetMatchPredicate()
9135     if (Inst.getOperand(4).getReg() == ARM::CPSR &&  in checkTargetMatchPredicate()
9136         (Inst.getOperand(0).getReg() == ARM::SP ||  in checkTargetMatchPredicate()
9137          Inst.getOperand(1).getReg() == ARM::SP))  in checkTargetMatchPredicate()
9144       Inst.getOperand(0).getReg() == ARM::SP && (isThumb() && !hasV8Ops()))  in checkTargetMatchPredicate()
9150       if ((Inst.getOperand(I).getReg() == ARM::SP) && !hasV8Ops())  in checkTargetMatchPredicate()
9152       else if (Inst.getOperand(I).getReg() == ARM::PC)  in checkTargetMatchPredicate()
9206             (ARMCC::CondCodes)Inst.getOperand(MCID.findFirstPredOperandIdx())  in MatchInstruction()
9230           (ARMCC::CondCodes)Inst.getOperand(MCID.findFirstPredOperandIdx())  in MatchInstruction()
9257           (ARMCC::CondCodes)Inst.getOperand(MCID.findFirstPredOperandIdx())  in MatchInstruction()