217   } ITState;  member in __anonb936c2650111::ARMAsmParser
231     ITInst.addOperand(MCOperand::createImm(ITState.Cond));  in flushPendingInstructions()
243     ITState.Mask = 0;  in flushPendingInstructions()
244     ITState.CurPosition = ~0U;  in flushPendingInstructions()
247   bool inITBlock() { return ITState.CurPosition != ~0U; }  in inITBlock()
248   bool inExplicitITBlock() { return inITBlock() && ITState.IsExplicit; }  in inExplicitITBlock()
249   bool inImplicitITBlock() { return inITBlock() && !ITState.IsExplicit; }  in inImplicitITBlock()
252     return ITState.CurPosition == 4 - countTrailingZeros(ITState.Mask);  in lastInITBlock()
260     unsigned TZ = countTrailingZeros(ITState.Mask);  in forwardITPosition()
261     if (++ITState.CurPosition == 5 - TZ && ITState.IsExplicit)  in forwardITPosition()
262       ITState.CurPosition = ~0U; // Done with the IT block after this.  in forwardITPosition()
268     assert(ITState.CurPosition > 1);  in rewindImplicitITPosition()
269     ITState.CurPosition--;  in rewindImplicitITPosition()
270     unsigned TZ = countTrailingZeros(ITState.Mask);  in rewindImplicitITPosition()
272     NewMask |= ITState.Mask & (0xC << TZ);  in rewindImplicitITPosition()
274     ITState.Mask = NewMask;  in rewindImplicitITPosition()
281     assert(ITState.CurPosition == 1);  in discardImplicitITBlock()
282     ITState.CurPosition = ~0U;  in discardImplicitITBlock()
293     unsigned Mask = ITState.Mask;  in getITMaskEncoding()
295     if ((ITState.Cond & 1) == 0) {  in getITMaskEncoding()
305     if (ITState.CurPosition == 1)  in currentITCond()
308       MaskBit = (ITState.Mask >> (5 - ITState.CurPosition)) & 1;  in currentITCond()
310     return MaskBit ? ITState.Cond : ARMCC::getOppositeCondition(ITState.Cond);  in currentITCond()
316     if (ITState.CurPosition == 1) {  in invertCurrentITCondition()
317       ITState.Cond = ARMCC::getOppositeCondition(ITState.Cond);  in invertCurrentITCondition()
319       ITState.Mask ^= 1 << (5 - ITState.CurPosition);  in invertCurrentITCondition()
325     return inITBlock() && (ITState.Mask & 1);  in isITBlockFull()
333     assert(Cond == ITState.Cond ||  in extendImplicitITBlock()
334            Cond == ARMCC::getOppositeCondition(ITState.Cond));  in extendImplicitITBlock()
335     unsigned TZ = countTrailingZeros(ITState.Mask);  in extendImplicitITBlock()
338     NewMask |= ITState.Mask & (0xE << TZ);  in extendImplicitITBlock()
340     NewMask |= (Cond == ITState.Cond) << TZ;  in extendImplicitITBlock()
343     ITState.Mask = NewMask;  in extendImplicitITBlock()
349     ITState.Cond = ARMCC::AL;  in startImplicitITBlock()
350     ITState.Mask = 8;  in startImplicitITBlock()
351     ITState.CurPosition = 1;  in startImplicitITBlock()
352     ITState.IsExplicit = false;  in startImplicitITBlock()
360     ITState.Cond = Cond;  in startExplicitITBlock()
361     ITState.Mask = Mask;  in startExplicitITBlock()
362     ITState.CurPosition = 0;  in startExplicitITBlock()
363     ITState.IsExplicit = true;  in startExplicitITBlock()
598     ITState.CurPosition = ~0U;  in ARMAsmParser()
9198     extendImplicitITBlock(ITState.Cond);  in MatchInstruction()
9256       ITState.Cond =  in MatchInstruction()