Lines Matching refs:BaseRegNum

747     unsigned BaseRegNum;  member
987 if(Memory.BaseRegNum != ARM::PC) return false; in isThumbMemPC()
1179 if (Memory.BaseRegNum && in isMem()
1180 !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum)) in isMem()
1256 if (Memory.BaseRegNum != ARM::PC) in isMemPCRelImm12()
1448 Memory.Alignment != 0 || Memory.BaseRegNum == ARM::PC) in isT2MemRegOffset()
1464 return isARMLowRegister(Memory.BaseRegNum) && in isMemThumbRR()
1470 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs4()
1480 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs2()
1490 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs1()
1500 Memory.BaseRegNum != ARM::SP || Memory.Alignment != 0) in isMemThumbSPI()
1537 if (Memory.BaseRegNum == ARM::PC) return false; in isMemImm8Offset()
1558 if (Memory.BaseRegNum == ARM::PC) return false; in isMemNegImm8Offset()
2318 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemNoOffsetOperands()
2345 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addAlignedMemoryOperands()
2408 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addAddrMode2Operands()
2451 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addAddrMode3Operands()
2496 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addAddrMode5Operands()
2518 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addAddrMode5FP16Operands()
2534 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemImm8s4OffsetOperands()
2542 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemImm0_1020s4OffsetOperands()
2549 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemImm8OffsetOperands()
2572 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemUImm12OffsetOperands()
2587 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemImm12OffsetOperands()
2601 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemTBBOperands()
2607 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemTBHOperands()
2616 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemRegOffsetOperands()
2623 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addT2MemRegOffsetOperands()
2630 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemThumbRROperands()
2637 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemThumbRIs4Operands()
2644 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemThumbRIs2Operands()
2651 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemThumbRIs1Operands()
2658 Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); in addMemThumbSPIOperands()
3122 CreateMem(unsigned BaseRegNum, const MCConstantExpr *OffsetImm, in CreateMem() argument
3127 Op->Memory.BaseRegNum = BaseRegNum; in CreateMem()
3263 if (Memory.BaseRegNum) in print()
3264 OS << " base:" << RegName(Memory.BaseRegNum); in print()
5075 int BaseRegNum = tryParseRegister(); in parseMemory() local
5076 if (BaseRegNum == -1) in parseMemory()
5089 Operands.push_back(ARMOperand::CreateMem(BaseRegNum, nullptr, 0, in parseMemory()
5146 Operands.push_back(ARMOperand::CreateMem(BaseRegNum, nullptr, 0, in parseMemory()
5197 Operands.push_back(ARMOperand::CreateMem(BaseRegNum, CE, 0, in parseMemory()
5241 Operands.push_back(ARMOperand::CreateMem(BaseRegNum, nullptr, OffsetRegNum, in parseMemory()