Lines Matching refs:CondCodes
172 ARMCC::CondCodes Pred, unsigned PredReg);
176 ARMCC::CondCodes Pred, unsigned PredReg, const DebugLoc &DL,
181 ARMCC::CondCodes Pred, unsigned PredReg, const DebugLoc &DL,
484 ARMCC::CondCodes Pred, in UpdateBaseRegUses()
625 ARMCC::CondCodes Pred, unsigned PredReg, const DebugLoc &DL, in CreateLoadStoreMulti()
824 ARMCC::CondCodes Pred, unsigned PredReg, const DebugLoc &DL, in CreateLoadStoreDouble()
893 ARMCC::CondCodes Pred = getInstrPredicate(*First, PredReg); in MergeOpsUpdate()
1175 ARMCC::CondCodes Pred, unsigned PredReg) { in isIncrementOrDecrement()
1205 ARMCC::CondCodes Pred, unsigned PredReg, int &Offset) { in findIncDecBefore()
1225 ARMCC::CondCodes Pred, unsigned PredReg, int &Offset) { in findIncDecAfter()
1260 ARMCC::CondCodes Pred = getInstrPredicate(*MI, PredReg); in MergeBaseUpdateLSMultiple()
1402 ARMCC::CondCodes Pred = getInstrPredicate(*MI, PredReg); in MergeBaseUpdateLoadStore()
1509 ARMCC::CondCodes Pred = getInstrPredicate(MI, PredReg); in MergeBaseUpdateLSDouble()
1609 bool BaseKill, bool BaseUndef, ARMCC::CondCodes Pred, in InsertLDR_STR()
1667 ARMCC::CondCodes Pred = getInstrPredicate(*MI, PredReg); in FixInvalidRegPairOp()
1742 ARMCC::CondCodes CurrPred = ARMCC::AL; in LoadStoreMultipleOpti()
1762 ARMCC::CondCodes Pred = getInstrPredicate(*MBBI, PredReg); in LoadStoreMultipleOpti()
2035 unsigned &PredReg, ARMCC::CondCodes &Pred,
2114 ARMCC::CondCodes &Pred, in CanFormLdStDWord()
2278 ARMCC::CondCodes Pred = ARMCC::AL; in RescheduleOps()