Lines Matching refs:STORE_OPCODE
269 #define STORE_OPCODE(VAR, OPC) VAR = isThumb ? ARM::t2##OPC : ARM::OPC in OpcodeCache() macro
270 STORE_OPCODE(SEXT16, SXTH); in OpcodeCache()
271 STORE_OPCODE(ZEXT16, UXTH); in OpcodeCache()
273 STORE_OPCODE(SEXT8, SXTB); in OpcodeCache()
274 STORE_OPCODE(ZEXT8, UXTB); in OpcodeCache()
276 STORE_OPCODE(AND, ANDri); in OpcodeCache()
277 STORE_OPCODE(RSB, RSBri); in OpcodeCache()
279 STORE_OPCODE(STORE32, STRi12); in OpcodeCache()
280 STORE_OPCODE(LOAD32, LDRi12); in OpcodeCache()
286 STORE_OPCODE(STORE8, STRBi12); in OpcodeCache()
287 STORE_OPCODE(LOAD8, LDRBi12); in OpcodeCache()