Lines Matching refs:RegVT
2379 EVT RegVT = VA.getLocVT(); in IsEligibleForTailCallOptimization() local
2393 if (RegVT == MVT::v2f64) { in IsEligibleForTailCallOptimization()
3670 EVT RegVT = VA.getLocVT(); in LowerFormalArguments() local
3703 if (RegVT == MVT::f16) in LowerFormalArguments()
3705 else if (RegVT == MVT::f32) in LowerFormalArguments()
3707 else if (RegVT == MVT::f64 || RegVT == MVT::v4f16) in LowerFormalArguments()
3709 else if (RegVT == MVT::v2f64 || RegVT == MVT::v8f16) in LowerFormalArguments()
3711 else if (RegVT == MVT::i32) in LowerFormalArguments()
3719 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); in LowerFormalArguments()
3732 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
3737 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()