Lines Matching refs:ArgValue
3498 SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, MVT::i32); in GetF64FormalArgument() local
3515 std::swap (ArgValue, ArgValue2); in GetF64FormalArgument()
3516 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2); in GetF64FormalArgument()
3616 SDValue ArgValue; in LowerFormalArguments() local
3690 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerFormalArguments()
3691 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, in LowerFormalArguments()
3692 ArgValue, ArgValue1, in LowerFormalArguments()
3694 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, in LowerFormalArguments()
3695 ArgValue, ArgValue2, in LowerFormalArguments()
3698 ArgValue = GetF64FormalArgument(VA, ArgLocs[++i], Chain, DAG, dl); in LowerFormalArguments()
3719 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); in LowerFormalArguments()
3729 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
3732 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
3734 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
3737 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
3739 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
3743 InVals.push_back(ArgValue); in LowerFormalArguments()