Lines Matching refs:Reg0

1797   SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);  in SelectVLD()  local
1819 Ops.push_back(Reg0); in SelectVLD()
1822 Ops.push_back(Reg0); in SelectVLD()
1835 const SDValue OpsA[] = { MemAddr, Align, Reg0, ImplDef, Pred, Reg0, Chain }; in SelectVLD()
1848 Ops.push_back(Reg0); in SelectVLD()
1852 Ops.push_back(Reg0); in SelectVLD()
1929 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVST() local
1976 Ops.push_back(Reg0); in SelectVST()
1980 Ops.push_back(Reg0); in SelectVST()
2005 const SDValue OpsA[] = { MemAddr, Align, Reg0, RegSeq, Pred, Reg0, Chain }; in SelectVST()
2020 Ops.push_back(Reg0); in SelectVST()
2024 Ops.push_back(Reg0); in SelectVST()
2097 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDSTLane() local
2106 Ops.push_back(IsImmUpdate ? Reg0 : Inc); in SelectVLDSTLane()
2130 Ops.push_back(Reg0); in SelectVLDSTLane()
2216 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDDup() local
2237 Ops.push_back(Reg0); in SelectVLDDup()
2240 Ops.push_back(Reg0); in SelectVLDDup()
2244 const SDValue OpsA[] = { MemAddr, Align, Pred, Reg0, Chain }; in SelectVLDDup()
2249 const SDValue OpsB[] = { MemAddr, Align, Pred, Reg0, Chain }; in SelectVLDDup()
2254 const SDValue OpsA[] = { MemAddr, Align, ImplDef, Pred, Reg0, Chain }; in SelectVLDDup()
2260 const SDValue OpsB[] = { MemAddr, Align, SuperReg, Pred, Reg0, Chain }; in SelectVLDDup()
2318 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
2326 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
2337 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
2346 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
2366 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
2371 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
2388 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
2393 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
2409 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
2414 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
2690 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
2692 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
2696 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
2697 Reg0 }; in Select()
2709 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
2711 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
2715 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
2716 Reg0 }; in Select()
4215 unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg(); in tryInlineAsm() local
4238 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in tryInlineAsm()
4253 SDValue T0 = CurDAG->getCopyFromReg(Chain, dl, Reg0, MVT::i32, in tryInlineAsm()